Testing logic cores using a BIST P1500 compliant approach: A case of study

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn 2005, Issue , 2005, Pages 228-233

  Bernardi, P ^a   Masera, G ^a   Quaglio, F ^a   Reorda, M Sonza ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

INTERFACES (COMPUTER); INTERNET; MICROPROCESSOR CHIPS; NETWORK PROTOCOLS;

AREA OVERHEAD; ATPG; DIAGNOSTIC CAPABILITY; SYSTEM-ON-A-CHIP (SOC);

BUILT-IN SELF TEST;

EID: 33646923423     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.305     Document Type: Conference Paper

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