A data flow fault coverage metric for validation of behavioral HDL descriptions

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2000-January, Issue , 2000, Pages 369-372

  Zhang, Qiushuang ^a   Harris, Ian G ^a  

^a University of Massachusetts   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; DATA FLOW ANALYSIS; DATA TRANSFER; DESIGN; FAULT DETECTION; FORMAL VERIFICATION; COMPUTER CIRCUITS; COMPUTER SIMULATION; FAILURE ANALYSIS; GRAPH THEORY; MATHEMATICAL MODELS;

BEHAVIORAL DESCRIPTIONS; CONTROL-DATA FLOW; FAULT COVERAGES; HARDWARE CIRCUITS; HDL DESCRIPTION; SIMULATION-BASED VALIDATION; STATEMENT COVERAGE; VERIFICATION TECHNIQUES;

COMPUTER AIDED DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES;

DATA FLOW PATHS; FORMAL VERIFICATION; HARDWARE CIRCUIT; VALIDATION FAULT COVERAGE METRIC;

EID: 0034483939     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2000.896500     Document Type: Conference Paper

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