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Volumn I, Issue , 2005, Pages 628-633

Design method tor constant power consumption of differential losic circuits

Author keywords

[No Author keywords available]

Indexed keywords

ENCRYPTION ALGORITHMS; INPUT SIGNALS; INTERNAL NODES; SIDE CHANNEL ATTACKS;

EID: 33646906840     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.113     Document Type: Conference Paper
Times cited : (53)

References (17)
  • 1
    • 2342548663 scopus 로고    scopus 로고
    • Information leakage attacks against smart card implementations of cryptographic algorithms and countermeasures - A survey
    • E. Hess, N. Janssen, B, Meyer and T. Schuetze, "Information Leakage Attacks Against Smart Card Implementations of Cryptographic Algorithms and Countermeasures - a Survey," in Proc. of EUROSMART, pp. 55-64, 2000.
    • (2000) Proc. of EUROSMART , pp. 55-64
    • Hess, E.1    Janssen, N.2    Meyer, B.3    Schuetze, T.4
  • 10
    • 84893732023 scopus 로고    scopus 로고
    • A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards
    • K. Tiri, M. Akmal and I. Verbauwhede, "A Dynamic and Differential CMOS Logic with Signal Independent Power Consumption to Withstand Differential Power Analysis on Smart Cards," in Proc. of European Solid-State Circuits Conference (ESSCIRC 2002), pp. 403-406, 2002.
    • (2002) Proc. of European Solid-state Circuits Conference (ESSCIRC 2002) , pp. 403-406
    • Tiri, K.1    Akmal, M.2    Verbauwhede, I.3
  • 13
    • 0035275045 scopus 로고    scopus 로고
    • Dynamic current mode logic (DyCML): A new low-power high-performance logic style
    • March
    • M. Allam and M. Elmasry, "Dynamic Current Mode Logic (DyCML): A New Low-Power High-Performance Logic Style," IEEE Journal of Solid-State Circuits, Vol. 36, pp. 550-558, March 2001.
    • (2001) IEEE Journal of Solid-state Circuits , vol.36 , pp. 550-558
    • Allam, M.1    Elmasry, M.2
  • 15
    • 0030285348 scopus 로고    scopus 로고
    • A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor
    • Nov.
    • J. Montanaro, et al., "A 160-MHz, 32-b, 0.5-W CMOS RISC Microprocessor," IEEE Journal of Solid-State Circuits, Vol. 31, pp. 1703-1712, Nov. 1996.
    • (1996) IEEE Journal of Solid-state Circuits , vol.31 , pp. 1703-1712
    • Montanaro, J.1
  • 16
    • 0022867125 scopus 로고
    • Design procedures for differential cascode voltage switch circuits
    • Dec.
    • K. Chu and D. Pulfrey, "Design Procedures for Differential Cascode Voltage Switch Circuits," IEEE Journal of Solid-State Circuits, Vol. 21, pp. 1082-1087, Dec. 1986.
    • (1986) IEEE Journal of Solid-state Circuits , vol.21 , pp. 1082-1087
    • Chu, K.1    Pulfrey, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.