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Volumn 3254, Issue , 2004, Pages 564-573

Design of a power/performance efficient single-loop sigma-delta modulator for wireless receivers

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; DELTA MODULATION; DELTA SIGMA MODULATION; DESIGN; WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 33646576637     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: None     Document Type: Article
Times cited : (3)

References (16)
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  • 3
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    • Burger, T.1    Hueng, Q.2
  • 4
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    • A 1.5 v 2.4/2.9 mW 79/50 dB DR Sigma-Delta modulator for GSM/WCDMA in a 0.13 um digital process
    • Gomez, G. and Haroun, B.: A 1.5 V 2.4/2.9 mW 79/50 dB DR Sigma-Delta modulator for GSM/WCDMA in a 0.13 um digital process. In: IEEE ISSCC Conference Digest of Technical Papers (2002) 242-244
    • (2002) IEEE ISSCC Conference Digest of Technical Papers , pp. 242-244
    • Gomez, G.1    Haroun, B.2
  • 5
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    • High-Order Multibit Modulators and Pseudo Data-Weighted-Averaging in Low-Oversampling ∑Δ ADCs for Broad-Band Applications
    • Hamoui, A.A., Martin, K.: High-Order Multibit Modulators and Pseudo Data-Weighted-Averaging in Low-Oversampling ∑Δ ADCs for Broad-Band Applications. In: IEEE Trans. Circuits Syst. I:Regular Papers, vol. 51, no. 1 (2004) 72-85
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  • 6
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    • A Multi-Bit Sigma-Delta ADC for Multi-Mode Receivers
    • Miller, M. R. and Perie C. S.: A Multi-Bit Sigma-Delta ADC for Multi-Mode Receivers. In: IEEE Journal of Solid-State Circuits, Vol. 38, no. 3 (2003) 475-482
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    • Miller, M.R.1    Perie, C.S.2
  • 7
    • 0029532111 scopus 로고
    • Linearity enhancement of multibit ∑Δ A/D and D/A converters using data weighted averaging
    • Baird, R.T. and Fiez, T.S.: Linearity enhancement of multibit ∑Δ A/D and D/A converters using data weighted averaging. In: IEEE Trans. Cir. Syst. II, vol. 42, no. 12 (1995) 753-762
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  • 9
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  • 10
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  • 11
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.