A 13.5mW, 185Msample/s Δ∑-modulator for UMTS/GSM dual-standard IF reception

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 44-45

  Burger, T ^a   Huang, Q ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CAPACITORS; CELLULAR TELEPHONE SYSTEMS; CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; DIGITAL SIGNAL PROCESSING; ELECTRIC FILTERS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; MATHEMATICAL TRANSFORMATIONS; RADIO RECEIVERS; SWITCHING;

INTERMEDIATE FREQUENCY (IF) RECEPTION;

MODULATORS;

EID: 0035062663     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. The design of bandpass Δ∑ ADCs, delta-sigma data converters - Theory, design and simulation
2. A two-path bandpass Δ∑ modulator with extended noise shaping
3. A 100 MHz IF, 400Msample/s CMOS direct-conversion bandpass ∑Δ modulator
4. On the optimum design of regulated cascode operational transconductance amplifiers