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Volumn 41, Issue 4, 2006, Pages 831-836
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A 512-Mb DDR3 SDRAM prototype with C IO minimization and self-calibration techniques
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Author keywords
Calibration; DDR3 SDRAM; Input capacitance; Per bank refresh; SCR type ESD; Signal integrity; Temperature sensor
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Indexed keywords
DDR3 SDRAM;
INPUT CAPACITANCE;
PER-BANK REFRESH;
SCR TYPE ESD;
SIGNAL INTEGRITY;
TEMPERATURE SENSOR;
CALIBRATION;
CAPACITANCE;
ELECTRIC POWER UTILIZATION;
OPTIMIZATION;
SENSORS;
THERMAL EFFECTS;
STATIC RANDOM ACCESS STORAGE;
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EID: 33645656262
PISSN: 00189200
EISSN: None
Source Type: Journal
DOI: 10.1109/JSSC.2006.870808 Document Type: Conference Paper |
Times cited : (39)
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References (6)
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