High-level synthesis of ΔΣ modulator topologies optimized for complexity, sensitivity, and power consumption

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 3, 2006, Pages 597-607

  Tang, Hua ^a,b   Doboli, Alex ^a  

^a Stony Brook University   (United States)

^b UNIVERSITY OF MINNESOTA DULUTH   (United States)

Author keywords

Delta sigma modulator; Sensitivity; Synthesis; Topology

Indexed keywords

CONSTRAINT THEORY; FEEDBACK; NONLINEAR PROGRAMMING; OPTIMIZATION; TOPOLOGY; TRANSFER FUNCTIONS;

DELTA-SIGMA MODULATORS; NOISE TRANSFER FUNCTION (NTF); SENSITIVITY; SYNTHESIS;

MODULATORS;

EID: 33244474270     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.854633     Document Type: Article

References (31)

1. B. Antao and A. Brodersen, "ARCHGEN: Automated synthesis of analog systems," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 3, no. 2, pp. 231-244, Jun. 1995.
2. O. Bajdechi, G. Gielen, and J. Huijsing, "Systematic design exploration of delta-sigma ADCs," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 86-95, Jan. 2004.
3. J. Cohn, D. Garrod, R. Rutenbar, and L. Carley, "KOAN/ANAGRAM II: New tools for device-level analog placement and routing," IEEE J. Solid.-State Circuits, vol. 26, no. 3, pp. 330-342, Mar. 1991.
4. A. Doboli and R. Vemuri, "Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, no. 11, pp. 1556-1568, Nov. 2003.
5. _, "Behavioral modeling for high-level synthesis of analog and mixed-signal systems from VHDL-AMS," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, no. 11, pp. 1504-1520, Nov. 2003.
6. W. Kruiskamp and D. Leenaerts, "DARWIN: CMOS opamp synthesis by means of a genetic algorithm," in Proc. Design Automation Conf. (DAC), San Francisco, CA, 1995, pp. 433-438.
7. M. Hershenson, S. Boyd, and T. H. Lee, "Optimal design of a CMOS op-amp via geometric programming," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 20, no. 1, pp. 1-21, Jan. 2001.
8. K. Lampaert, G. Gielen, and W. Sansen, Analog Layout Generation for Performance, and Manufacturability. Boston, MA: Kluwer, 1999.
9. P. Maulik, L. Carley, and R. Rutenbar, "Integer programming based topology selection of cell-level analog circuits," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 14, no. 4, pp. 401-412, Apr. 1995.
10. S. Leyffer and R. Fletcher. User Manual for MINLP_BB. [Online]. Available: www-neos.mcs.anl.gov/neos/solvers/MINCO:MINLP-AMPL
11. G. Fischer and A. Davis, "Alternative topologies for sigma-delta modulators - A comparative study," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, no. 10, pp. 789-796, Oct. 1997.
12. K. Francken and G. Gielen, "DAISY: A simulation-based high-level synthesis tool for delta-sigma modulators," in Proc. Int. Conf. Computer-Aided Design (ICCAD), San Jose, CA, 2000, pp. 188-192.
13. _, "A high-level simulation and synthesis environment for delta-sigma modulators," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 22, no. 8, pp. 1049-1061, Aug. 2003.
14. G. Gielen and R. Rutenbar, "Computer aided design of analog and mixed-signal integrated circuits," Proc. IEEE, vol. 88, no. 12, pp. 1825-1854, Dec. 2000.
15. M. Hershenson, "Design of pipeline analog-to-digital converters via geometric programming," in Proc. Int. Conf. Computer-Aided Design, San Jose, CA, 2002, pp. 317-324.
16. S. Kadivar, "A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters," in Proc. Int. Conf. Computer-Aided Design, San Jose, CA, 1995, pp. 554-561.
17. J. Koza, F. Bennet, D. Andre, M. Keane, and F. Dunlap, "Automated synthesis of analog electrical circuits by means of genetic programming," IEEE Trans. Evol. Comput., vol. 1, no. 2, pp. 109-128, Jul. 1997.
18. T. Kuo, K. Chen, and J. Chen, "Automatic coefficients design for high-order sigma-delta modulators," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 46, no. 1, pp. 6-15, Jan. 1999.
19. A. Marques, V. Peluso, M. Steyaert, and W. Sansen, "Optimal parameters for delta-sigma modulator topologies," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 9, pp. 1232-1241, Sep. 1998.
20. F. Medeiro, A. Verdu, and A. Vazquez, Top-Down Design of High-Performance ΔΣ Modulators. Boston, MA: Kluwer, 1999.
21. S. Norsworthy, R. Schreier, and G. Ternes, Delta-Sigma Data Converters: Theory, Design, and Simulation. Piscataway, NJ: IEEE Press, 1996.
22. J. Markus and G. Temes, "An efficient ΔΣ ADC architecture for low oversampling ratios," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 63-71, Jan. 2004.
23. L. Huelsman, Active, and Passive Analog Filter Design: An Introduction. New York: McGraw Hill, 1993.
24. R. Schaumann and M. Valkenburg, Design of Analog Filters. New York: Oxford Univ. Press, 2001.
25. D. Ribner, "A comparison of modulator networks for high-order oversampled delta-sigma analog-to-digital converters," IEEE Trans. Circuits Syst., vol. 38, no. 2, pp. 145-159, Feb. 1991.
26. R. Schreier, The Delta-Sigma Toolbox 6.0, (Dec. 2004). [Online]. Available: http://www.mathworks.com/matlabcentral/fileexchange
27. T. Sripramong and C. Toumazou, "The invention of CMOS amplifiers using genetic programming and current flow analysis," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., vol. 21, no. 11, pp. 1237-1252, Nov. 2002.
28. H. Tang and A. Doboli, "MINLP based topology synthesis for delta-sigma modulators optimized for signal path complexity, sensitivity and power consumption," in Proc. Design, Automation and Test Europe (DATE), Messe Munich, Germany, Mar. 2005, pp. 264-269.
29. H. Tang, H. Zhang, and A. Doboli, "Towards high-level synthesis of analog and mixed-signal systems from VHDL-AMS specifications - A case study for a sigma-delta analog-digital converter," in Forum Specification and Design Languages (FDL), Frankfurt, Germany, 2003, pp. 201-216.
30. _, "Synthesis of continuous-time filters and analog to digital converters by integrated constraint transformation, floorplanning and routing," in Proc. Great Lakes Symp. VLSI (GLSVLSI), Washington, DC, 2003, pp. 207-210.
31. H. Zhang and A. Doboli, "Fast time domain symbolic simulation for synthesis of ΣΔ analog-digital converters," in Proc. Int. Symp. Circuits Systems (ISCAS), Vancouver, BC, Canada, 2004, pp. 125-128.