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Volumn , Issue , 2003, Pages 207-210

Synthesis of continuous-time filters and analog to digital converters by integrated constraint transformation, floorplanning and routing

Author keywords

Continuous time filter; Synthesis; modulator

Indexed keywords

ANALOG TO DIGITAL CONVERSION; COMPUTER AIDED DESIGN; MODULATORS; OPTIMIZATION; PRODUCT DESIGN; ROUTERS; SAMPLING;

EID: 0038714051     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/764808.764861     Document Type: Conference Paper
Times cited : (7)

References (11)
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  • 3
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    • A. Doboli, R. Vemuri, "A Regularity Based Hierarchical Symbolic Analysis Method for Large scale Analog Networks", IEEE Trans. on C & S - Part II, Vol. 48, No. 11, Nov. 2001.
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  • 4
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    • DAISY: A simulation-based high-level synthesis tool for sigma-delta modulators
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    • (2002) Proc. ICCAD
    • Franken, K.1
  • 5
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    • Computer aided design of analog and mixed-signal integrated circuits
    • Dec
    • G. Gielen, R. Rutenbar, "Computer Aided Design of Analog and Mixed-signal Integrated Circuits", Proc. of IEEE, vol 88, No 12, Dec 2000, pp. 1825-1852.
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    • Gielen, G.1    Rutenbar, R.2
  • 6
    • 0035059137 scopus 로고    scopus 로고
    • Optimal design of a CMOS op-amp via geometric programming
    • Jan
    • M. Hershenson, S. Boyd and T. Lee, "Optimal design of a CMOS op-amp via Geometric Programming", IEEE Trans. CAD, Vol.20, NO.1, Jan 2001, pp. 1-21.
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    • Hershenson, M.1    Boyd, S.2    Lee, T.3
  • 7
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    • Synthesis of high-performance analog circuits in ASTRX/OBLX
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  • 8
    • 0036575783 scopus 로고    scopus 로고
    • Efficient synthesis of OTA networks for linear analog functions
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    • B. Ray et al, "Efficient Synthesis of OTA Networks for Linear Analog Functions", IEEE Trans. CADICS, Vol. 21, May 2002.
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  • 9
    • 84889779638 scopus 로고    scopus 로고
    • Layout-aware analog system synthesis based on symbolic layout description and combined block parameter exploration, placement and global routing
    • H. Tang, H. Zhang, A. Doboli, "Layout-Aware Analog System Synthesis Based on Symbolic Layout Description and Combined Block Parameter Exploration, Placement and Global Routing", IEEE Computer Society Annual Symposium on VLSI, 2003.
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  • 11
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.