Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 22, Issue 11, 2003, Pages 1556-1568

  Doboli, Alex ^a   Vemuri, Ranga ^b  

^a STONY BROOK UNIVERSITY   (United States)

^b University of Cincinnati   (United States)

Author keywords

Analog synthesis; High level synthesis; Optimization; System architectures

Indexed keywords

CAPACITORS; ELECTRIC NETWORK TOPOLOGY; FREQUENCY DOMAIN ANALYSIS; HEURISTIC METHODS; LINEAR NETWORKS; OPERATIONAL AMPLIFIERS; OPTIMIZATION; RESISTORS;

HIGH-LEVEL SYNTHESIS; LINEAR ANALOG SYSTEM; TABU SEARCH HEURISTIC; TWO-STEP PARAMETER OPTIMIZATION;

LINEAR NETWORK SYNTHESIS;

EID: 0242720629     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2003.818374     Document Type: Article

References (43)

1. IEEE Standard VHDL Language Reference Manual (Integrated With VHDL-AMS Changes), IEEE Std. 1076.1.
2. B. Antao and A. Brodersen, "ARCHGEN: Automated synthesis of analog systems," IEEE Trans. VLSI Syst., vol. 3, pp. 231-244, June 1995.
3. J. Cohn, D. Garrod, R. Rutenbar, and L. Carley, "KOAN/ANAGRAM II: New tools for device-level analog placement and routing," IEEE J. Solid-State Circuits, vol. 26, pp. 330-342, Mar. 1991.
4. G. De Micheli, Synthesis and Optimization of Digital Circuits. New York: McGraw-Hill, 1994.
5. N. R. Dhanwada et al., "Hierarchical constraint transformation using directed interval search for analog system synthesis," in Proc. Design, Automation and Test Eur. Conf., 1999, pp. 328-335.
6. A. Doboli and R. Vemuri, "A VHDL-AMS compiler and architecture generator for behavioral synthesis of analog systems," in Proc. Design, Automation and Test Eur. Conf., 1999, pp. 338-345.
7. ____, "Hierarchical optimization for synthesis of linear analog systems," presented at the Int. Symp. Circuits and Systems, 2001.
8. ____, "A regularity-based hierarchical symbolic analysis method for large-scale analog networks," IEEE Trans. Circuits Syst. II, vol. 48, pp. 1054-1068, 2001.
9. ____, "A functional specification notation for co-design of mixed analog-digital systems," presented at the Design, Automation and Test Eur. Conf., 2002.
10. H. Fino, J. Franca, and A. S. Garcao, "Symbolic signal flow graph methods in switched-capacitor design," in Symbolic Analysis Techniques, F. Fernandez, A. Rodriguez-Vazquez, J. Huertas, and G. Gielen, Eds. New York: IEEE-Wiley, 1997.
11. J. Franks, C. Sizemore, and D. Dunn, "Ear based hearing protector/communication system," U.S. Patent 5 426 719, June 20, 1995.
12. S. Ganesan and R. Vemuri, "Technology mapping and retargeting for field programmable analog arrays," in Proc. Design. Automation and Test Eur. Conf., 2000, pp. 58-64.
13. G. Gielen and R. Rutenbar, "Computer-aided design of analog and mixed-signal integrated circuits," Proc. IEEE, vol. 88, pp. 1825-1852, Dec. 2000.
14. G. Gielen, "Panel: When will the analog design flow catch up with digital methodologies," presented at the Design Automation Conference, 2001.
15. R. Gregorian and G. Temes, Analog MOS Integrated Circuits for Signal Processing. New York: Wiley, 1986.
16. R. K. Henderson, L. Ping, and J. I. Sewell, "Analog integrated filter compilation," Analog Integr. Circuits Signal Process., vol. 3, pp. 217-218, 1993.
17. M. Ismail and T. Fiez, Analog VLSI. Signal and Information Processing. New York: McGraw-Hill, 1994.
18. A. Konczykowska and M. Bon, "Structural synthesis and optimization of analog circuits," in Symbolic Analysis Techniques, F. Fernandez, A. Rodriguez-Vazquez, J. Huertas, and G. Gielen, Eds. New York: IEEE-Wiley, 1997.
19. J. Koza et al., "Automated synthesis of analog electrical circuits by means of genetic programming," IEEE Trans. Evol. Comput., vol. 1, pp. 109-128, July 1997.
20. M. Krasnicki, R. Phelps, R. Rutenbar, and L. Carley, "MAELSTROM: Efficient simulation-based synthesis for custom analog cells," in Proc. Design Automation Conf., 1999, pp. 945-950.
21. W. Kruiskamp and D. Leenaerst, "DARWIN: CMOS opamp synthesis by means of a genetic algorithm," in Proc. Design Automation Conf., 1995, pp. 433-438.
22. M. Kucic, A. Low, and P. Hasler, "A programmable continuous-time floating-gate fourier processor," IEEE Trans. Circuits Syst. II, vol. 48, pp. 90-99, Jan. 2001.
23. K. Laker and W. Sansen, Design of Analog Integrated Circuits and Systems. New York: Mc-Graw Hill, 1994.
24. M. del Mar Hershenson, S. Boyd, and T. Lee, "GPCAD: A tool for CMOS op-amp synthesis," in Proc. Int. Conf. Computer-Aided Design, 1998, pp. 296-303.
25. P. Maulik, R. Carley, and R. Rutenbar, "A Mixed-integer nonlinear programming approach to analog circuit synthesis," in Proc. Design Automation Conf., 1992, pp. 698-703.
26. G. McCormick, Nonlinear Programming. New York: Wiley, 1983.
27. L. McIlrath, "A low-power analog correlation processor for real-time camera alignment and motion computation," IEEE Trans. Circuits Syst., vol. 47, pp. 1353-1364, Dec. 2000.
28. F. Medeiro, A. Perez-Verdu, and A. Rodriguez-Vazquez, Top-Down Design of High-Performance Sigma-Delta Modulators. Norwell, MA: Kluwer, 1999.
29. A. Muralt, P. Zbinden, and G. Moschytz, "CAD tools for synthesis and layout of SC filters and networks," Analog Integr. Circuits Signal Process., vol. 3, pp. 229-242, 1993.
30. E. Ochotta, R. Rutenbar, and R. Carley, "Synthesis of high-performance analog circuits in ASTRX/OBLX," IEEE Trans. Computer-Aided Design, vol. 15, pp. 273-294, Mar. 1996.
31. K. Ogata, Modern Control Engineering. Englewood Cliffs, NJ: Prentice-Hall, 1990.
32. R. Phelps, M. Krasnicki, R. Rutenbar, L. Carley, and J. Hellums, "Anaconda: Simulation-based synthesis of analog circuits via stochastic pattern search," IEEE Trans. Computer-Aided Design, vol. 19, pp. 703-717, June 2000.
33. B. N. Ray, P. P. Chaudhuri, and P. K. Nandi, "Efficient synthesis of OTA network for linear analog functions," IEEE Trans. Computer-Aided Design, vol. 21, pp. 517-533, May 2002.
34. C. Reeves, Modern Heuristic Techniques for Combinatorial Problems. New York: Wiley, 1993.
35. E. Sanchez-Sinencio and J. Ramirez-Angulo, "AROMA: An area optimized CAD program for cascade SC filter design," IEEE Trans. Computer-Aided Design, vol. CAS-14, pp. 296-303, 1985.
36. R. Stogdill, "Dealing with obsolete parts," IEEE Des. Test Comput., pp. 17-25, Apr.-June 1999.
37. K. Su, Analog Filters. London, U.K.: Chapman & Hall, 1996.
38. J. Trontely, L. Trontelj, and G. Shenton, Analog Digital ASIC Design. New York: McGraw-Hill, 1989.
39. G. Van Der Pas et al., "EsteMate: A tool for automated power and area estimation in analog top-down design and synthesis," Proc. IEEE Custom Integrated Circuits Conf., pp. 139-142, 1997.
40. G. Van Der Plas et al., "AMGIE-A synthesis environment for CMOS analog integrated circuits," IEEE Trans. Computer-Aided Design, vol. 20, pp. 1037-1058, Sept. 2001.
41. P. Veselinovic et al., "A flexible topology selection program as part of an analog synthesis system," presented at the Eur. Design and Test Conf., 1995.
42. R. Weyrick, Fundamentals of Analog Computers. Englewood Cliffs, NJ: Prentice-Hall, 1969.
43. J. Wu and E. El-Masry, "Design of current-mode linear filters using coupled-biquads," IEEE Trans. Circuits Syst. II, vol. 45, pp. 1445-1454, Nov. 1998.