Two-level BEOL processing for rapid iteration in MRAM development

IBM Journal of Research and Development

Volumn 50, Issue 1, 2006, Pages 41-54

  Gaidis, Michael C ^a   O'Sullivan, Eugene J ^b   Nowak, Janusz J ^b   Lu, Yu ^b   Kanakasabapathy, Sivananda ^b   Trouilloud, Philip L ^b   Worledge, Daniel C ^b   Assefa, Solomon ^b   Milkove, Keith R ^b   Wright, Gwen P ^b   Gallagher, William J ^b  

^a IBM   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRODES; MAGNETIC FILMS; MAGNETIC STORAGE; SEMICONDUCTOR DEVICE MANUFACTURE; THIN FILMS; TUNNEL JUNCTIONS;

BACK-END-OF-LINE (BEOL) PROCESSING; COMPLEX MAGNETIC FILM STACKS; DEVICE FABRICATION; FRONT-END DEVICE DRIVERS; MAGNETIC RANDOM ACCESS MEMORY (MRAM); THIN-FILM PROCESS INTEGRATION;

RANDOM ACCESS STORAGE;

EID: 32944467858     PISSN: 00188646     EISSN: 00188646     Source Type: Journal    
DOI: 10.1147/rd.501.0041     Document Type: Article

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