Measurement of electronic packaging material behavior and flip chip die stresses at extreme low temperatures

Proceedings of the ASME/Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems: Advances in Electronic Packaging 2005

Volumn PART B, Issue , 2005, Pages 1253-1262

  Rahim, M Kaysar ^b   Suhling, Jeffrey C ^b   Jaeger, Richard C ^b   Islam, M Saiful ^b   Ma, Hongtao ^b   Lin, Chang ^b   Lall, Pradeep ^b   Knight, Roy ^b   Strickland, Mark ^a   Blanche, Jim ^a  

^a NASA MARSHALL SPACE FLIGHT CENTER   (United States)

^b NONE

Author keywords

[No Author keywords available]

Indexed keywords

FINITE ELEMENT METHOD; FLIP CHIP DEVICES; LOW TEMPERATURE EFFECTS; MATHEMATICAL MODELS; SILICON WAFERS; STRESS ANALYSIS;

ELECTRONIC ASSEMBLIES; FINITE ELEMENT MODELS; STRESS-STRAIN BEHAVIOR;

ELECTRONICS PACKAGING;

EID: 32844465374     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1115/ipack2005-73349     Document Type: Conference Paper

References (14)

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