Spread spectrum clock generator with delay cell array to reduce electromagnetic interference

IEEE Transactions on Electromagnetic Compatibility

Volumn 47, Issue 4, 2005, Pages 908-920

  Kim, Jonghoon ^a   Kam, Dong Gun ^b   Jun, Pil Jung ^a   Kim, Joungho ^b  

^a SAMSUNG Electronics   (South Korea)

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Electromagnetic interference (EMI); Spread spectrum clock (SSC)

Indexed keywords

ARRAYS; ATTENUATION; CAPACITANCE MEASUREMENT; CMOS INTEGRATED CIRCUITS; JITTER; MICROSTRIP LINES; PHASE LOCKED LOOPS;

DELAY CELL ARRAY; DIGITAL CLOCK DRIVERS; DIGITAL SYSTEMS; SPREAD SPECTRUM CLOCK (SSC); SYNCHRONIZED CIRCUITS;

SIGNAL INTERFERENCE;

EID: 31744444092     PISSN: 00189375     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEMC.2005.859063     Document Type: Article

References (16)

1. H. Ott, Noise Reduction Techniques in Electronic Systems, 2nd ed. New York: Wiley, 1988, pp. 298-321.
2. F. Lin and D. Chen, "Reduction of power supply EMI emission by switching frequency modulation," IEEE Trans. Power Electron., vol. 9, no. 1, pp. 132-137, 1994.
3. K. Hardin, J. Fessler, and D. Bush, "Spread spectrum clock generation for the reduction of radiated emissions," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, Feb. 1994, pp. 227-231.
4. Cypress Preliminary Datasheet, CY2220, "133-MHz spread spectrum clock synthesizer/driver with differential CPU outputs," 1999.
5. "CK00 clock synthesizer/driver design guidelines," Intel, 2000.
6. J. Kim, P. Jun, J. Byun, and J. Kim, "Design guidelines of spread spectrum clock for suppression of radiation and interference from high-speed interconnection line," in Proc. IEEE Workshop Signal Propag. Interconnects, 2002, pp. 189-192.
7. J. Kim, P. Jun, and J. Kim, "Dithered timing spread spectrum clock generation for reduction of electromagnetic radiated emission from high-speed digital system," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 2002, pp. 413-418.
8. K. Hardin, J. Fessler, N. Webb, J. Berry, A. Cable, and M. Pulley, "Design considerations of phase-locked loop systems for spread spectrum clock generation compatibility," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1997, pp. 302-307.
9. K. Hardin, J. Fessler, and D. Bush, "A study of the interference potential of spread spectrum clock generation techniques," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1995, pp. 624-629.
10. Cypress Semiconductor Corporation, "Clock terminology," revised Jul. 1997.
11. R. Rust, P. Luque, and D. Knee, "Digitally phase modulated clock inhibiting reduced RF emission," U.S. Patent 5 731 664, 1995.
12. I. Greiss, "Digital modulated clock circuit for reducing EMI spectral density," U.S. Patent 5, vol. 731, no. 728, 1998.
13. Y. Moon, D. Jeong, and G. Kim, "Clock dithering for electromagnetic compliance using spread spectrum phase modulation," in Proc. IEEE Int. Solid-State Circuits Conf., 1999, pp. 186-187.
14. J. Kim, H. Kim, W. Ryu, J. Kim, Y.Yun, S. Kim, S. Ham, H. An, and Y. Lee, "Effects of on-chip and off-chip decoupling capacitors on electromagnetic radiated emission," in Proc 48th Electronic Components & Technology Conf., 1998, pp. 601-614.
15. H. Kim, J. Kim, W. Ryu, M. Sung, S. Ahn, and J. Kim, "Suppression of radiated emission from an 8-bit micro-controller using gate-oxide filtering capacitors," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 1999, pp. 811-815.
16. J. Kim, B. Choi, H. Kim, W. Ryu, Y. Yun, S. Ham, S. Kim, Y. Lee, and J. Kim, "Separated role of on-chip and on-PCB decoupling capacitors for reduction of radiated emission on printed circuit board," in Proc. IEEE Int. Symp. Electromagnetic Compatibility, 2001, pp. 531-536.