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Volumn , Issue , 1997, Pages 302-307
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Design considerations of phase-locked loop systems for spread spectrum clock generation compatibility
a a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
DIGITAL SIGNAL PROCESSING;
ELECTROMAGNETIC COMPATIBILITY;
ELECTROMAGNETIC WAVE EMISSION;
MATHEMATICAL MODELS;
TIMING CIRCUITS;
SPREAD SPECTRUM CLOCK GENERATION (SSCG);
PHASE LOCKED LOOPS;
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EID: 0031366477
PISSN: 01901494
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (27)
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References (6)
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