A 165-Gb/s 4:1 Multiplexer in InP DHBT technology

Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC

Volumn , Issue , 2005, Pages 260-263

  Hallin, Joakim ^a   Kjellberg, Torgil ^a   Swahn, Thomas ^a  

^a CHALMERS UNIVERSITY OF TECHNOLOGY   (Sweden)

Author keywords

4:1 Multiplexer; High speed digital circuit; InP DHBT

Indexed keywords

MICROPROCESSOR CHIPS; MULTIPLEXING; SEMICONDUCTING INDIUM PHOSPHIDE;

INP DHBT; MULTI-PHASE CLOCK ARCHITECTURE; SUPPLY VOLTAGES;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 30944446640     PISSN: 15508781     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CSICS.2005.1531833     Document Type: Conference Paper

References (9)

1. max over 300 GHz in a new manufacturable technology," IEEE Electron Device Letters, vol. 25, pp. 520-522, 2004.
2. M. Le, G. He, R. Hess, P. Partyka, B. Li, R. Bryie, S. Rustomji, G. Kim, R. Lee, J. Pepper, M. Helix, R. Milano, R. Elder, D. Jansen, F. Stroili, J. Lai, M. Feng, "Self-Aligned InP DHBTs for 150GHz Digital and Mixed Signal Circuits," Indium Phosphide and Related Materials Conference 2005, May 8-12 2005
3. Z. Griffith, M. Dahlström, M.J.W. Rodwell, M. Urteaga, R. Pierson, P. Rowell, B. Brar, S. Lee, N. Nguyen, and C. Nguyen, "Ultra high frequency static dividers > 150 GHz in a narrow mesa InGaAs/InP DHBT technology", Proceedings of the Bipolar/BiCMOS Circuits and Technology 2004 Meeting, pp. 176-179.
4. D.A. Hitko, T. Hussain, J.F. Jensen, Y. Royter, S.L. Morton, D.S. Matthews, R.D. Rajavel, I. Milosavljevlc, C.H. Fields, S. III. Thomas, A. Kurdoghllan, Z. Lao, K. Elliott, and M. Sokolfch, "A low power (45mW/latch) static 150GHz CML divider," IEEE Compound Semiconductor Integrated Circuit Symposium, Oct. 2004 pp. 167-170.
5. M. Meghelli, "132-Gb/s 4:1 multiplexer in 0.13-μm SiGe-bipolar technology," IEEE Journal of Solid-State Circuits, vol. 39, pp. 2403-2407, 2004.
6. K. Murata, K. Sano, H. Kitabayashi, S. Sugitani, H. Sugahara, and T. Enoki, "100-Gb/s multiplexing and demultiplexing IC operations in InP HEMT technology," IEEE Journal of Solid-State Circuits, vol. 39, pp. 207-213, 2004.
7. Y. Suzuki, Z. Yamazaki, Y. Amamiya, S. Wada, H. Uchida, C. Kurioka, S. Tanaka, and H. Hida, "120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs," IEEE Journal of Solid-State Circuits, vol. 39, pp. 2397-2402, 2004.
8. T. Suzuki, Y. Nakasha, T. Takahashi, K. Makiyama, T. Hirose, and M. Takikawa, "144-Gbit/s selector and 100-Gbit/s 4:1 multiplexer using InP HEMTs," 2004 IEEE MTT-S International Microwave Symposium Digest, June 2004 pp. 117-120.
9. T. Suzuki, T. Takahashi, K. Makiyama, K. Sawada, Y. Nakasha, T. Hirose, and M. Takikawa, "Under 0.5W 50Gb/s full-rate 4:1MUX and 1:4 DEMUX in 0.13μm InP HEMT technology," 2004 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, vol. 47, pp. 234-235, 525.