Optimized wafer-probe and assembled package test design for analog circuits

ACM Transactions on Design Automation of Electronic Systems

Volumn 10, Issue 2, 2005, Pages 303-329

  Bhattacharya, Soumendu ^a,b   Chatterjee, Abhijit ^a,b  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Analog and mixed signal test; Assembled package; Co optimization; Prototype; Simulation; Test; Test cost minimization; Test generation and co optimization; Wafer probe

Indexed keywords

EID: 30544434098     PISSN: 10844309     EISSN: 10844309     Source Type: Journal    
DOI: 10.1145/1059876.1059882     Document Type: Review

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