Analog testing with time response parameters

IEEE Design and Test of Computers

Volumn 13, Issue 2, 1996, Pages 18-25

  Balivada, Ashok ^a,b,c,e   Chen, Jin ^a,d   Abraham, Jacob A ^{a,c,e,f,g,h,i}  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^b INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^c IEEE

^d TONGJI UNIVERSITY   (China)

^e The University of Texas at Austin   (United States)

^f Computer Engineering Research Center ^*

^g UNIVERSITY OF KERALA   (India)

^h STANFORD UNIVERSITY   (United States)

ⁱ ACM

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER TESTING; FAILURE ANALYSIS; ITERATIVE METHODS; LAPLACE TRANSFORMS; MATHEMATICAL MODELS; TIME DOMAIN ANALYSIS; TRANSFER FUNCTIONS; WAVEFORM ANALYSIS;

FAULT SIMULATION; LINEAR ANALOG CIRCUITS; TEST GENERATION;

ANALOG COMPUTERS;

EID: 0030167772     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.500197     Document Type: Article

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