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Volumn , Issue , 1999, Pages 189-194

Minimal length diagnostic tests for analog circuits using test history

Author keywords

[No Author keywords available]

Indexed keywords

DIAGNOSTIC TESTS; DIVIDE AND CONQUER; FAULT DROPPING; MEASUREMENT PROCEDURES; MINIMAL LENGTHS; SIMULATION AND OPTIMIZATION; TEST GENERATIONS; TRANSIENT TESTS;

EID: 0002414249     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.1999.761120     Document Type: Conference Paper
Times cited : (10)

References (17)
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    • Milor, L.1    Vincentelli, A.S.2
  • 2
    • 0024714777 scopus 로고
    • Predictive subset testing: Optimizing ic parametric performance for quality, cost and yield
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    • (1989) IEEE Transactions on Semiconductor Manufacturing , vol.2 , pp. 104-113
    • Brockman, B.1    Director, S.W.2
  • 3
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    • Dc-iatp: An iterative analog circuit test generation program for generating dc single pattern tests
    • M. J. Marlett and J. A. Abraham. "DC-IATP: An iterative analog circuit test generation program for generating DC single pattern tests," International Test Conference, pp. 839-845, 1988.
    • (1988) International Test Conference , pp. 839-845
    • Marlett, M.J.1    Abraham, J.A.2
  • 4
    • 0024612038 scopus 로고
    • Detection of catastrophic faults in analog integrated circuits
    • L. Milor and V. Viswanathan, "Detection of catastrophic faults in analog integrated circuits," IEEE Transactions on Computer Aided Design, pp. 114-130, Vol. 8,1989.
    • (1989) IEEE Transactions on Computer Aided Design , vol.8 , pp. 114-130
    • Milor, L.1    Viswanathan, V.2
  • 7
    • 0002621116 scopus 로고
    • An integrated approach for analog circuit testing with minimum number of detected parameters
    • M. Salamani, B. Kaminska and G. Quesnel, "An integrated approach for analog circuit testing with minimum number of detected parameters," International Test Conference, pp. 631-640, 1994.
    • (1994) International Test Conference , pp. 631-640
    • Salamani, M.1    Kaminska, B.2    Quesnel, G.3
  • 8
    • 0029326967 scopus 로고
    • Multifrequency analysis of faults in analog circuits
    • Summer
    • M. Salamani and B. Kaminska, "Multifrequency analysis of faults in analog circuits," IEEE Design & Test of Computers, pp. 70-80, Summer 1995.
    • (1995) IEEE Design & Test of Computers , pp. 70-80
    • Salamani, M.1    Kaminska, B.2
  • 9
    • 0030205616 scopus 로고    scopus 로고
    • Optimization based multifrequency test generation for analog circuits
    • A. Abderrahman, E. Cerny and B. Kaminska, "Optimization based multifrequency test generation for analog circuits," Journal of Electronic Testing, pp. 59-73, Vol. 9, 1996.
    • (1996) Journal of Electronic Testing , vol.9 , pp. 59-73
    • Abderrahman, A.1    Cerny, E.2    Kaminska, B.3
  • 10
    • 0026743410 scopus 로고
    • Test vector generation for linear analog devices
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  • 12
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  • 14
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    • Test generation for comprehensive testing of linear analog circuits using transient response sampling
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  • 17
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.