Simultaneous state, Vt and Tox assignment for total standby power minimization

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 1, Issue , 2004, Pages 494-499

  Lee, Dongwoo ^a   Deogun, Harmander ^a   Blaauw, David ^a   Sylvester, Dennis ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLIP-FLOP MODIFICATION; THICK-OXIDE TRANSISTORS; TOTAL STANDBY POWER MINIMIZATION; TOX ASSIGNMENT; BENCHMARK CIRCUIT; DELAY CONSTRAINTS; GATE OXIDE LEAKAGE CURRENTS; GATE OXIDE THICKNESS; LEAKAGE CURRENT REDUCTION; MOBILE APPLICATIONS; OPTIMIZATION PROBLEMS; SUB-THRESHOLD LEAKAGE;

ALGORITHMS; BENCHMARKING; CMOS INTEGRATED CIRCUITS; HEURISTIC METHODS; LOGIC DEVICES; TRANSISTORS; EXHIBITIONS;

STANDBY POWER SERVICE; LEAKAGE CURRENTS;

EID: 3042610022     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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