RTL processor synthesis for architecture exploration and implementation

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn , Issue , 2004, Pages 156-160

  Schliebusch, Oliver ^a   Chattopadhyay, A ^a   Leupers, R ^a   Ascheid, G ^a   Meyr, H ^a   Steinert, Mario ^b   Braun, Gunnar ^c   Nohl, Achim ^c  

^a RWTH AACHEN UNIVERSITY   (Germany)

^b INFINEON TECHNOLOGIES AG   (Germany)

^c CoWare Inc ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE EXPLORATION; DESIGN AUTOMATION TOOLS;

C (PROGRAMMING LANGUAGE); COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; ELECTRIC POWER UTILIZATION; GATES (TRANSISTOR); SIGNAL PROCESSING;

PROGRAM PROCESSORS;

EID: 3042608053     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269223     Document Type: Conference Paper

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