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Volumn 2, Issue , 2004, Pages 1276-1281

A methodology and tool suite for C compiler generation from ADL processor models

Author keywords

[No Author keywords available]

Indexed keywords

CODE QUALITY; DESIGN PLATFORM; DESIGN PROCESS; EMBEDDED PROCESSORS; ARCHITECTURE EXPLORATION; EFFICIENT ARCHITECTURE; EFFICIENT DESIGNS; PROCESSOR MODELING; PROCESSOR MODELS; RETARGETABLE;

EID: 3042519012     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269071     Document Type: Conference Paper
Times cited : (41)

References (23)
  • 5
    • 3042668679 scopus 로고    scopus 로고
    • Tensilica Inc.: http://www.tensilica.com
  • 6
    • 3042631653 scopus 로고    scopus 로고
    • Target Compiler Technologies: http://www.retarget.com
  • 7
    • 3042673528 scopus 로고    scopus 로고
    • Free Software Foundation/EGCS: http://gcc.gnu.org
  • 13
    • 0031623719 scopus 로고    scopus 로고
    • Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator
    • S. Hanono, S. Devadas: Instruction Selection, Resource Allocation, and Scheduling in the AVIV Retargetable Code Generator, 35th Design Automation Conference (DAC), 1998
    • (1998) 35th Design Automation Conference (DAC)
    • Hanono, S.1    Devadas, S.2
  • 17
    • 3042578142 scopus 로고    scopus 로고
    • Associated Compiler Experts bv: http://www.ace.nl
  • 23
    • 3042678298 scopus 로고    scopus 로고
    • ST200: A VLIW architecture for media-oriented applications
    • F. Homewood and P. Faraboschi: ST200: A VLIW Architecture for Media-Oriented Applications, Microprocessor Forum, 2000
    • (2000) Microprocessor Forum
    • Homewood, F.1    Faraboschi, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.