Fault-tolerant platforms for automotive safety-critical applications

CASES 2003: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

Volumn , Issue , 2003, Pages 170-177

  Baleani, M ^a   Ferrari, A ^a   Mangeruca, L ^a   Sangiovanni Vincentelli, A ^a   Peri, Maurjzio ^b   Pezzini, Saverio ^c  

^a PARADES EEIG   (Italy)

^b STMICROELECTRONICS   (Italy)

^c NONE

Author keywords

Automotive; Fault tolerant; Multi processor; Safety critical; System on a chip; VLSI

Indexed keywords

AUTOMOBILES; COLLISION AVOIDANCE; COMPUTER ARCHITECTURE; MICROCONTROLLERS; MULTIPROCESSING SYSTEMS; SAFETY FACTOR; VLSI CIRCUITS;

AUTOMOTIVE; FAULT-TOLERANT; MULTI-PROCESSORS; SAFETY CRITICAL; SYSTEM-ON-A-CHIP;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 3042573509     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/951732.951734     Document Type: Conference Paper

References (15)

1. R. Baumann. The impact of technology scaling on soft error rate performance and limits to the efficacy of error correction. In Digest of the Internation Electron Devices Meeting IEDM'02., pages 329-332, 2002.
2. R.C. Baumann. Soft errors in advanced semiconductor devices - part I: The three radiation sources. IEEE Transaction on Device and Materials Reliability, 1(1):17-22, Mar 2001.
3. E. Böhl, Th. Lindenkreuz, and R. Stephan, The fail-stop controller AE11. In Proceedings of the International Test Conference, pages 567-577, Nov 1997.
4. F. Cristian. Understanding fault-tolerant distributed systems. Communications of the ACM, 34(2):56-78, Feb 1991.
5. A. Ferrari, S. Garue, M. Peri, S. Pezzini, L. Valsecchi, F. Andretta, and W. Nesci. Design and implementation of a dual processor platform for power-train systems. In Proceedings of Convergence Conference, October 2000.
6. A. Ferrari and A. Sangiovanni-Vincentelli. System design: Traditional concepts and new paradigms. In Proceedings of the International Conference on Computer Design, October 1996.
7. L. T. Fruehling. Delphi secured microcontroller architecture. In Desing and Technologies for Automotive Safety-Critical Systems, SAE 2000 World Congress, 2000.
8. R. Isermann, R. Schwarz, and S. Stolzl. Fault-tolerant drive-by-wire systems. IEEE Control Systems Magazine, 22(5):64-81, Oct 2002.
9. J.H. Lala and R.E. Harper. Architectural principles for safety-critical real-time applications. Proceedings of the IEEE, 82(1):25-40, Jan 1994.
10. V.P. Nelson. Fault-tolerant computing: Fundamental concepts. IEEE Computer, 23(7):19-25, Jul 1990.
11. M. Nicolaidis and B. Courtois. Strongly code disjoint checkers, transcomp, 37(6):751-756, Jun 1988.
12. V.B. Prasad. Fault tolerant digital systems. IEEE Potentials, 8(1):17-21, Feb 1989.
13. N. Seifert, Xiaowei Zhu, and L.W. Massengill. Impact of scaling on soft-error rates in commercial microprocessors. IEEE Transactions on Nuclear Science, 49(6):3100-3106, Dec 2002.
14. P. Shivakumar, M. Kistler, S.W. Keckler, D. Burger, and L. Alvisi. Modeling the effect of technology trends on the soft error rate of combinational logic. In Proceedings of the International Conference on Dependable Systems and Networks, pages 389-398, 2002.
15. K. Wilken and J.P. Shen. Continuous signature monitoring: Low-cost concurrent detection of processor control errors. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 9(6):629-641, Jun 1990.