Automated, accurate macromodelling of digital aggressors for power/ground/substrate noise prediction

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 2, Issue , 2004, Pages 824-829

  Wang, Zhe ^a   Murgai, Rajeev ^b   Roychowdhury, Jaijeet ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

^b FUJITSU LABORATORIES OF AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MACROMODEL COMPLEXITY; NOISE ANALYSIS; POWER DISTRIBUTION NETWORKS; TIME-VARYING MACROMODELS; ACCURATE ESTIMATION; EXTRACTION TECHNIQUES; LINEAR TIME VARYING; MACRO-MODELLING; MIXED-SIGNAL CIRCUIT DESIGN; NOISE PREDICTIONS; NONLINEAR LOADING; POWER DISTRIBUTION NETWORK;

COMPUTER SIMULATION; DIGITAL CIRCUITS; ELECTRIC POWER SYSTEMS; ELECTRIC RESISTANCE; INDUCTANCE; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; SIGNAL PROCESSING; SPURIOUS SIGNAL NOISE; TRANSISTORS; AUTOMATION; EXHIBITIONS;

ELECTRICAL ENGINEERING; DIGITAL LIBRARIES;

EID: 3042511807     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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