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Volumn 93, Issue 1, 2006, Pages 29-40

Characteristics of a variable length ring oscillator and its use in PLL based systems

Author keywords

FM demodulator; Frequency synthesizer; PLL; Ring oscillator

Indexed keywords

FM-MODULATOR; FREQUENCY SYNTHESIZER; RING OSCILLATOR;

EID: 29244439375     PISSN: 00207217     EISSN: 13623060     Source Type: Journal    
DOI: 10.1080/00207210500312703     Document Type: Article
Times cited : (7)

References (15)
  • 3
    • 0026963463 scopus 로고
    • NMOS ICs for clock and data regeneration in gigabit-per-second optical fiber receivers
    • S.K. Enam and A. Abidi, "NMOS ICs for clock and data regeneration in gigabit-per-second optical fiber receivers", IEEE Journal of Solid State Circuit, 27, pp. 1763-1774, 1992.
    • (1992) IEEE Journal of Solid State Circuit , vol.27 , pp. 1763-1774
    • Enam, S.K.1    Abidi, A.2
  • 4
    • 0030246798 scopus 로고    scopus 로고
    • A new digital PLL for the class i partial response channel
    • S. Fukuda, "A new digital PLL for the class I partial response channel" IEEE Transactions on Magnetics, 32, pp. 3974-3976, 1996.
    • (1996) IEEE Transactions on Magnetics , vol.32 , pp. 3974-3976
    • Fukuda, S.1
  • 7
    • 0017535235 scopus 로고
    • Improved demodulation of sampled FM signals in high noise
    • P.K.S. Jam and J.B. Moore, "Improved demodulation of sampled FM signals in high noise", IEEE Transaction, COM-25, pp. 1052-1054, 1977.
    • (1977) IEEE Transaction , vol.COM-25 , pp. 1052-1054
    • Jam, P.K.S.1    Moore, J.B.2
  • 8
    • 0025550911 scopus 로고
    • A 30 MHz hybrid analog-digital clock recovery circuit in 2-μm CMOS
    • K.B. Kim, D. Helman and P. Gray, "A 30 MHz hybrid analog-digital clock recovery circuit in 2-μm CMOS", IEEE Journal of Solid State Circuit, 25, pp. 1385-1394, 1990.
    • (1990) IEEE Journal of Solid State Circuit , vol.25 , pp. 1385-1394
    • Kim, K.B.1    Helman, D.2    Gray, P.3
  • 10
    • 0034270136 scopus 로고    scopus 로고
    • The effect of varactor nonlinearity on the phase noise of completely integrated VCOs
    • J.W.M. Rogers, J.A. Macedo and C. Plett, "The effect of varactor nonlinearity on the phase noise of completely integrated VCOs", IEEE Journal of Solid State Circuits, 35, pp. 1360-1367, 2000.
    • (2000) IEEE Journal of Solid State Circuits , vol.35 , pp. 1360-1367
    • Rogers, J.W.M.1    Macedo, J.A.2    Plett, C.3
  • 11
    • 0035493955 scopus 로고    scopus 로고
    • Novel PLL based frequency synthesizer without using the frequency divider
    • B.C. Sarkar and A. Hati, "Novel PLL based frequency synthesizer without using the frequency divider", IEE Proceedings Circuit Devices System, 148, pp. 255-260, 2001.
    • (2001) IEE Proceedings Circuit Devices System , vol.148 , pp. 255-260
    • Sarkar, B.C.1    Hati, A.2
  • 12
    • 0035368885 scopus 로고    scopus 로고
    • A 1.25 GHz 0.35 μm monolithic CMOS PLL based on a multiphase ring oscillator
    • L. Sun and T.A. Kwasniewski, "A 1.25 GHz 0.35 μm monolithic CMOS PLL based on a multiphase ring oscillator", IEEE Journal of Solid State Circuits, 36, pp. 910-916, 2001.
    • (2001) IEEE Journal of Solid State Circuits , vol.36 , pp. 910-916
    • Sun, L.1    Kwasniewski, T.A.2
  • 13
    • 0030689965 scopus 로고    scopus 로고
    • A 0.25 μm CMOS/SIMOX PLL clock generator embedded in a gate array LSI with 5 to 400 MHz lock range
    • H. Sutoh, K. Yamakoshi, and M. INO, "A 0.25 μm CMOS/SIMOX PLL clock generator embedded in a gate array LSI with 5 to 400 MHz lock range", IEEE Proceedings of Custom Integrated Circuits Conference, pp. 41-44, 1997.
    • (1997) IEEE Proceedings of Custom Integrated Circuits Conference , pp. 41-44
    • Sutoh, H.1    Yamakoshi, K.2    Ino, M.3
  • 14
    • 0031257973 scopus 로고    scopus 로고
    • CMOS VCOs for PLL frequency synthesis in GHz digital mobile radio communications
    • M. Thamsirianunt and T.A. Kwasniewski, "CMOS VCOs for PLL frequency synthesis in GHz digital mobile radio communications", IEEE Journal of Solid State Circuits, 32, pp. 1511-1524, 1997.
    • (1997) IEEE Journal of Solid State Circuits , vol.32 , pp. 1511-1524
    • Thamsirianunt, M.1    Kwasniewski, T.A.2
  • 15
    • 0022690257 scopus 로고
    • Loop gain compensation in phase locked loops
    • R. Yeager, "Loop gain compensation in phase locked loops", RCA Review, 47, pp. 78-87, 1986.
    • (1986) RCA Review , vol.47 , pp. 78-87
    • Yeager, R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.