The microarchitecture of FPGA-based soft processors

CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

Volumn , Issue , 2005, Pages 202-212

  Yiannacouras, Peter ^a   Rose, Jonathan ^a   Gregory Steffan, J ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

Application specific tradeoff; ASIP; Embedded processor; Exploration; FPGA; Microarchitecture; Nios; Pipeline; RTL generation; Soft processor; SPREE

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS; NATURAL FREQUENCIES; SOCIETIES AND INSTITUTIONS;

APPLICATION SPECIFIC TRADEOFF; MICROARCHITECTURE; SOFT PROCESSORS;

MICROPROCESSOR CHIPS;

EID: 29144519395     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1086297.1086325     Document Type: Conference Paper

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