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Volumn , Issue , 2004, Pages 13-
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Optimizing a high performance 32-bit processor for programmable logic
a
a
Altera
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Author keywords
[No Author keywords available]
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Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
COMPUTER ARCHITECTURE;
COMPUTER SOFTWARE;
DATA STORAGE EQUIPMENT;
FIELD PROGRAMMABLE GATE ARRAYS;
FORMAL LOGIC;
FREQUENCY MULTIPLYING CIRCUITS;
PROGRAMMABLE LOGIC CONTROLLERS;
32-BIT PROCESSORS;
BARREL SHIFTERS;
NIOS 2 PROCESSOR;
PROGRAMMABLE LOGIC;
PROGRAM PROCESSORS;
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EID: 21244499783
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (10)
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References (0)
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