Architectural Support for Real-Time Task Scheduling in SMT

CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

Volumn , Issue , 2005, Pages 166-176

  Cazorla, Francisco J ^a   Fernández, Enrique ^b   Knijnenburg, Peter M W ^c   Ramirez, Alex ^d   Sakellariou, Rizos ^a   Valero, Mateo ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b UNIVERSITY OF LAS PALMAS DE GRAN CANARIA   (Spain)

^c LEIDEN UNIVERSITY   (Netherlands)

^d UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

ILP; Multi threading; Performance Predictability; Real Time; Scheduling; SMT; Thread level parallelism

Indexed keywords

COMPUTER HARDWARE; COSTS; REAL TIME SYSTEMS; SCHEDULING;

MULTI-THREADING; SIMULTANEOUS MULTITHREAD (SMT); THREAD-LEVEL PARALLELISM;

COMPUTER ARCHITECTURE;

EID: 29144505105     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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