High-throughput multi-rate decoding of structured low-density parity-check codes

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E88-A, Issue 12, 2005, Pages 3539-3546

  Fanucci, Luca ^a   Rovini, Massimo ^a,b   L'Insalata, Nicola E ^a   Rossi, Francesco ^a  

^a UNIVERSITY OF PISA   (Italy)

^b EUROPEAN SPACE AGENCY   (Netherlands)

Author keywords

High throughput architecture; Low density parity check; Multi rate decoders; Structured codes; Vectorised architecture; WLAN

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DECODING; LOCAL AREA NETWORKS; THROUGHPUT; VLSI CIRCUITS;

HIGH-THROUGH ARCHITECTURE; LOW-DENSITY PARITY-CHECK; MECHANICAL LOADING; MULTI-RATE DECODERS; STRUCTURED CODES;

CODES (SYMBOLS);

EID: 29144462692     PISSN: 09168508     EISSN: 17451337     Source Type: Journal    
DOI: 10.1093/ietfec/e88-a.12.3539     Document Type: Article

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