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1
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0034739021
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Alternative dielectrics to silicon dioxide for memory and logic devices
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A. Kingon, J. Maria, and S. Streiffer, "Alternative dielectrics to silicon dioxide for memory and logic devices," NATURE, vol. 406, pp. 1032-1038, 2000.
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(2000)
NATURE
, vol.406
, pp. 1032-1038
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Kingon, A.1
Maria, J.2
Streiffer, S.3
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2
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0035718371
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Conventional n-channel MOSFET devices using single layer HfO2 and ZrO2 as high-k gate dielectrics with polysilicon gate electrode
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G. F. Yudong Kim; Gebara, M.; Barnett, J.; Riley, D.; Chen, J.; Torres, K.; JaeEun Lim; Foran, B.; Shaapur, F.; Agarwal, A.; Lysaght, P.; Brown, G.A.; Young, C.; Borthakur, S.; Hong-Jyh Li; Nguyen, B.; Zeitzoff, P.; Bersuker, G.; Derro, D.; Bergmann, R.; Murto, R.W.; Hou, A.; Huff, H.R.; Shero, E.; Pomarede, C.; Givens, M.; Mazanez, M.; Werkhoven, C., "Conventional n-channel MOSFET devices using single layer HfO2 and ZrO2 as high-k gate dielectrics with polysilicon gate electrode," presented at International Electron Devices Meeting, 2001.
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(2001)
International Electron Devices Meeting
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Yudong Kim, G.F.1
Gebara, M.2
Barnett, J.3
Riley, D.4
Chen, J.5
Torres, K.6
Lim, J.7
Foran, B.8
Shaapur, F.9
Agarwal, A.10
Lysaght, P.11
Brown, G.A.12
Young, C.13
Borthakur, S.14
Li, H.-J.15
Nguyen, B.16
Zeitzoff, P.17
Bersuker, G.18
Derro, D.19
Bergmann, R.20
Murto, R.W.21
Hou, A.22
Huff, H.R.23
Shero, E.24
Pomarede, C.25
Givens, M.26
Mazanez, M.27
Werkhoven, C.28
more..
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3
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0035717577
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80 nm poly-Si gate CMOS with HfO2 gate dielectric
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C. T. Hobbs, H.; Reid, K.; Taylor, B.; Dip, L.; Hebert, L.; Garcia, R.; Hegde, R.; Grant, J.; Gilmer, D.; Franke, A.; Dhandapani, V.; Azrak, M.; Prabhu, L.; Rai, R.; Bagchi, S.; Conner, J.; Backer, S.; Dumbuya, F.; Nguyen, B.; Tobin, P., "80 nm poly-Si gate CMOS with HfO2 gate dielectric," presented at International Electron Devices Meeting, 2001.
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(2001)
International Electron Devices Meeting
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Hobbs, C.T.H.1
Reid, K.2
Taylor, B.3
Dip, L.4
Hebert, L.5
Garcia, R.6
Hegde, R.7
Grant, J.8
Gilmer, D.9
Franke, A.10
Dhandapani, V.11
Azrak, M.12
Prabhu, L.13
Rai, R.14
Bagchi, S.15
Conner, J.16
Backer, S.17
Dumbuya, F.18
Nguyen, B.19
Tobin, P.20
more..
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4
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0041340533
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Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing
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D. Schroder and J. Babcock, "Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing," JOURNAL OF APPLIED PHYSICS, vol. 94, pp. 1-18, 2003.
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(2003)
Journal of Applied Physics
, vol.94
, pp. 1-18
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Schroder, D.1
Babcock, J.2
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5
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0037718399
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Origin of the threshold voltage instability in SiO/sub2//HfO/sub2/ dual layer gate dielectrics
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A. C. Kerber, E.; Pantisano, L.; Degraeve, R.; Kauerauf, T.; Kim, Y.; Hou, A.; Groeseneken, G.; Maes, H.E.; Schwalke, U., "Origin of the threshold voltage instability in SiO/sub2//HfO/sub2/ dual layer gate dielectrics," Electron Device Letters, IEEE, vol. 24, pp. 87-89, 2003.
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(2003)
Electron Device Letters, IEEE
, vol.24
, pp. 87-89
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Kerber, A.C.E.1
Pantisano, L.2
Degraeve, R.3
Kauerauf, T.4
Kim, Y.5
Hou, A.6
Groeseneken, G.7
Maes, H.E.8
Schwalke, U.9
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6
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84932169547
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Charge trapping and device performance degradation in MOCVD hafnium-based gate dielectric stack structures
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C. D. B. Young, G.; Brown, G.A.; Lysaght, P.; Zeitzoff, P.; Murto, R.W.; Huff, H.R., "Charge trapping and device performance degradation in MOCVD hafnium-based gate dielectric stack structures," presented at IEEE International Reliability Physics Symposium Proceedings, 2004.
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(2004)
IEEE International Reliability Physics Symposium Proceedings
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Young, G.C.D.B.1
Brown, G.A.2
Lysaght, P.3
Zeitzoff, P.4
Murto, R.W.5
Huff, H.R.6
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7
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1642289216
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Evaluation of NBTI in HfO2 gate-dielectric stacks with tungsten gates
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S. Zafar, Y. Lee, and J. Stathis, "Evaluation of NBTI in HfO2 gate-dielectric stacks with tungsten gates," IEEE ELECTRON DEVICE LETTERS, vol. 25, pp. 153-155, 2004.
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(2004)
IEEE Electron Device Letters
, vol.25
, pp. 153-155
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Zafar, S.1
Lee, Y.2
Stathis, J.3
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9
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84889347577
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Dynamic NBTI of PMOS transistors and its impact on device lifetime
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G. C. Chen, K.Y.; Li, M.F.; Chan, D.S.H.; Ang, C.H.; Zheng, J.Z.; Jin, Y.; Kwong, D.L., "Dynamic NBTI of PMOS transistors and its impact on device lifetime," presented at IEEE International Reliability Physics Symposium Proceedings, 2003.
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(2003)
IEEE International Reliability Physics Symposium Proceedings
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Chen, K.Y.G.C.1
Li, M.F.2
Chan, D.S.H.3
Ang, C.H.4
Zheng, J.Z.5
Jin, Y.6
Kwong, D.L.7
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11
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84932126501
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Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors
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V. D. Huard, M., "Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors," presented at IEEE International Reliability Physics Symposium Proceedings, 2004.
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(2004)
IEEE International Reliability Physics Symposium Proceedings
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Huard, M.V.D.1
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12
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0035696970
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Study of low-frequency charge pumping on thin stacked dielectrics
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C. Weintraub, E. Vogel, J. Hauser, N. Yang, V. Misra, J. Wortman, J. Ganem, and P. Masson, "Study of low-frequency charge pumping on thin stacked dielectrics," IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 48, pp. 2754-2762, 2001.
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(2001)
IEEE Transactions on Electron Devices
, vol.48
, pp. 2754-2762
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Weintraub, C.1
Vogel, E.2
Hauser, J.3
Yang, N.4
Misra, V.5
Wortman, J.6
Ganem, J.7
Masson, P.8
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