A Modified Architecture Used for Input Matching in CMOS Low-Noise Amplifiers

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 52, Issue 11, 2005, Pages 784-788

  Shouxian, Mou ^a   Jian Guo, Ma ^a   Seng, Yeo Kiat ^a   Anh, Do Manh ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Bluetooth; CMOS; HiperLAN; input matching; low noise amplifier (LNA); wireless LAN

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC INDUCTORS; ELECTRIC POTENTIAL; LOCAL AREA NETWORKS; MOSFET DEVICES; SCHEMATIC DIAGRAMS; SPURIOUS SIGNAL NOISE; WIRELESS TELECOMMUNICATION SYSTEMS;

BLUETOOTH; GATE AND SOURCE INDUCTORS; HIPERLAN; INPUT MATCHING; LOW-NOISE AMPLIFIERS (LNA); WIRELESS LAN;

AMPLIFIERS (ELECTRONIC);

EID: 28444453695     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2005.852930     Document Type: Article

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