A 5-6 GHz fully-integrated CMOS LNA for a dual-band WLAN receiver

Proceedings - RAWCON 2002: 2002 IEEE Radio and Wireless Conference

Volumn , Issue , 2002, Pages 213-215

  Mukherjee, D ^a   Bhattacharjee, J ^a   Chakraborty, S ^a   Laskar, J ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; NOISE FIGURE; RADIO RECEIVERS; SIGNAL RECEIVERS;

DIGITAL CMOS; DUAL-BAND DIRECT-CONVERSION; DUAL-BAND RECEIVER; FULLY INTEGRATED; IN CONTEXTS; INPUT MATCHING; WLAN RECEIVERS; WLAN STANDARDS;

LOW NOISE AMPLIFIERS;

EID: 12344270362     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RAWCON.2002.1030155     Document Type: Conference Paper

References (3)

1. S. Chakraborty, C.-H. Lee, S. Yoo, D. Heo, A. Raghavan, D. Mukherjee, J. Bhattacharjee, J. Laskar, "A GaAs Based High Performance Transceiver Front-end Chipset for 5-6 GHz Wireless Applications," IEEE Radio and Wireless Conference (RAWCON), 2001.
2. K. Lim, A. Obatoyinbo, A. Sutono, S. Chakraborty, C.-H. Lee, E. Gebara, A. Raghavan, J. Laskar, "A highly integrated transceiver module for 5.8 GHz OFDM communication system using Multi-layer packaging Technology," 2001 IEEE MTT-S Int. Microwave Symp. Dig., Vol. 1, pp. 65-68, June 2001.
3. J. Chen, B. Shi, "Impact of Intrinsic Channel Resistance on Noise Performance of CMOS LNA," IEEE Electron Device Letters, Vol. 23, No. 1, pp. 34-36, Jan 2002.