Using the Weak Inversion Region to Optimize Input Stage Design of CMOS Op Amps

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 51, Issue 1, 2004, Pages 8-14

  Comer, David J ^a   Comer, Donald T ^a  

^a 435 Crabtree Technology Building   (United States)

Author keywords

Input stage; low distortion; weak inversion

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; HARMONIC DISTORTION; INTEGRATED CIRCUIT LAYOUT; MOSFET DEVICES; OPERATIONAL AMPLIFIERS; OPTIMIZATION;

OPTIMIZE INPUT STAGE DESIGN; SIGNAL PARAMETERS; VOLTAGE GAIN; WEAK INVERSION;

CMOS INTEGRATED CIRCUITS;

EID: 4544246902     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2003.821517     Document Type: Editorial

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