Hybrid simulation for embedded software energy estimation

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 23-26

  Muttreja, Anish ^a   Raghunathan, Anand ^b   Ravi, Srivaths ^b   Jha, Niraj K ^a  

^a Princeton University   (United States)

^b NEC LABORATORIES AMERICA   (United States)

Author keywords

Embedded Software; Energy Estimation; Energy Macro models; Hybrid Simulation; Pointer Analysis

Indexed keywords

COMPUTER SIMULATION; EMBEDDED SYSTEMS; ENERGY UTILIZATION; ERROR ANALYSIS; ESTIMATION; FUNCTIONS; ITERATIVE METHODS;

EMBEDDED SOFTWARE; ENERGY ESTIMATION; ENERGY MACRO-MODELS; HYBRID SIMULATION; POINTER ANALYSIS;

COMPUTER SOFTWARE;

EID: 27944433815     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.245623     Document Type: Conference Paper

References (17)

1. P. Magarshack and P. G. Paulin, "System-on-chip beyond the nanometer wall," in Proc. Design Automation Conf., June 2003, pp. 419-424.
2. J. Zhu and D. D. Gajski, "A retargetable, ultra-fast instruction set simulator," in Proc. Design Automation &. Test Europe Conf., Mar. 1999, p. 62.
3. A. Nohl, G. Braun, O. Schliebusch, R. Leupers, H. Meyr, and A. Hoffmann, "A universal technique for fast and flexible instruction-set architecture simulation." in Proc. Design Automation Conf., June 2002, pp. 22-27.
4. W. S. Mong and J. Zhu, "Dynamosim: A trace-based dynamically compiled instruction set simulator," in Proc. Int. Conf. Computer-Aided Design, Nov. 2004, pp. 131-136.
5. M. Reshadi, N. Bansal, P. Mishra, and N. Dun, "An efficient retargetable framework for instruction-set simulation," in Proc. Int. Conf. Hardware/Software Codesign &. System Synthesis, Oct. 2003, pp. 13-18.
6. W. Qin and S. Malik, "Flexible and formal modeling of microprocessors with application to retargetable simulation," in Proc. Design Automation & Test Europe Conf., Mar. 2003, pp. 556-561.
7. E. Perelman, G. Hamerly, and B. Calder, "Picking statistically valid and early simulation points," in Proc. Int. Conf. Parallel Architectures & Compilation Techniques, 2003.
8. V. S. P. Rapaka and D. Marculsecu, "Pre-charcterization free, efficient power/performance analysis of embedded and general purpose software applications," in Proc. Design Automation & Test Europe Conf., 2003, pp. 504-509.
9. T. K. Tan, A. Raghunathan, G. Lakshminarayana, and N. K. Jha, "High-level energy macro-modeling of embedded software," IEEE Trans. Computer-Aided Design, vol. 21, pp. 1037-1050, Sept. 2002.
10. C. Brandolese, W. Fornaciari, F. Salice, und D. Sciuto, "Library functions timing characterization for source-level analysis," in Proc. Design Automation & Test Europe Conf., Mar. 2003, pp. 1132-1133.
11. S. H. Yong and S. Horwitz, "Pointer-range analysis," in Proc. Int. Static Analysis Symp., Aug. 2004, pp. 133-148.
12. A. Muttreja, A. Raghunathan, S. Ravi, and N. K. Jha, "Automated energy/performance macromodeling of embedded software," in Proc. Design Automation Conf., June 2004, pp. 99-102.
13. W. Qin, "The Simlt-ARM simulator." [Online], Available: http://www.ee.princeton.edu/~wqin/armsim.htm
14. C. Lee, M. Potkonjak, and W. H. Mangione-Smith, "MediaBench: A tool for evaluating and synthesizing multimedia and communicatons systems," in Proc. Int. Symp. Microarchitecture, Nov. 1997, pp. 330-335.
15. M. R. Guthaus, J. S. Ringenberg. D. Ernst, T. M. Austin, T. Mudge, and R. B. Brown, "MiBench: A free, commercially representative embedded benchmark suite," in Proc. Wkshp. Workload Characterization, Dec. 2001, pp. 3-14.
16. S. Patel, "Finger-print verification system." [Online]. Available: http://fvs.sourceforge.net/
17. A. Sinha and A. P. Chandrakasan, "JouleTrack - A web based tool for software energy profiling," in Proc. Design Automation Conf., June 2001, pp. 220-225.