CMOS compatible super junction LDMOST with N-Buffer layer

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Volumn , Issue , 2005, Pages 163-166

  Park, Il Yong ^a,b   Andre, C ^a   Salama, T ^a  

^a UNIVERSITY OF TORONTO   (Canada)

^b Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER CIRCUITS; ELECTRIC BREAKDOWN; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS; SENSITIVITY ANALYSIS;

CHARGE COMPENSATION; N-BUFFER LAYERS; PILLARS; SUPER JUNCTION LDMOST;

CMOS INTEGRATED CIRCUITS;

EID: 27744450918     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Sameh G. Nassif-Khalil and C. Andre T. Salama, "Super junction LDMOST in silicon-on-Sapphire technology (SJ-LDMOST)," Proc. Int. Symp. Power Semiconductor Devices and ICs (ISPSD), pp. 81-84, 2002
2. Shuming Xu, K. P. Gan, Ganesh S. Samudra, Yung C. Liang, and Johnny K. O. Sin, "120 V interdigitated-drain LDMOS (IDLDMOS) on SOI substrate breaking power LDMOS limit," IEEE Trans. Electron Devices, Vol. 47, pp. 1980-1985, 2000
3. R. Ng, F. Udrea, K. Sheng, K. Ueno, G. A. J. Amaratunga, and M. Nishiura, "Lateral unbalanced super junction (USJ) / 3D-RESURF for high breakdown voltage on SOI," Int. Symp. Power Semiconductor Devices and ICs (ISPSD), pp. 395-398, 2001
4. Tatsuhiko Fujihira, "Theory of semiconductor superjunction devices," Jpn. J. Appl. Phys. Vol. 36, pp. 6254-6262, 1997
5. Sameh G. Nassif-Khalil and C. Andre T. Salama, "SJ/RESURF LDMOST," IEEE Trans. Electron Devices, Vol. 51, pp. 1185-1191, 2004
6. T. Sakai, S. Matsumoto, I. J. Kim, T. Fujumitsu, and T. Yachi, "Potential of SOI power MOSFETs as a switching device for megahertz DC/DC converters," IEEE Power Electronics Specialist Conference (PESC) Proceedings, Vol. 1, pp. 450-456, 1994