A digital-to-RF-amplitude converter for GSM/GPRS/EDGE in 90-nm digital CMOS

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2005, Pages 21-24

  Cruise, Patrick ^a   Hung, Chih Ming ^a   Staszewski, Robert Bogdan ^a   Eliezer, Oren ^a   Rezeq, Sameh ^a   Maggio, Ken ^a   Leipold, Dirk ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

All digital; Amplitude modulation; Deep submicron CMOS; EDGE; GSM; PA buffer; PA driver; Polar transmitter; Power amplifier

Indexed keywords

ALL DIGITAL; DEEP-SUBMICRON CMOS; NMOS SWITCHES; PA BUFFER; PA DRIVER; POLAR TRANSMITTER;

AMPLITUDE MODULATION; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; GROUND PENETRATING RADAR SYSTEMS; POWER AMPLIFIERS; POWER CONTROL; SIGNAL FILTERING AND PREDICTION; TRANSMITTERS;

CMOS INTEGRATED CIRCUITS;

EID: 27644443984     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. R. B. Staszewski, J. Wallberg, S. Rezeq, et al., "All-Digital PLL and GSM/EDGE Transmitter in 90nm CMOS," Proc. of IEEE Solid-State Circuits Conf., sec. 17.5, pp. 316-317, 600, Feb. 2005.
2. R. B. Staszewski, K. Muhammad, D. Leipold, et al., "All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS," IEEE J. Solid-State Circuits, vol. 39, pp. 2278-2291, Dec. 2004.
3. E. Hegazi, A. Abidi, "A 17-mW transmitter and frequency synthesizer for 900-MHz GSM fully integrated in 0.35μm CMOS," IEEE Journal of Solid-State Circuits, vol. 38, pp. 782-792, May 2003.
4. R. B. Staszewski, D. Leipold, C.-M. Hung, and P. T. Balsara, "A first digitally-controlled oscillator in a deep-submicron CMOS process for multi-GHz wireless applications," Proc. of 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symp., sec. MO4B-2, pp. 81-84, June 2003.
5. R. B. Staszewski, D. Leipold, K Muhammad, and P. T. Balsara, "Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS process," IEEE Trans, on Circuits and Systems II, vol. 50, no. 11, pp. 815-828, Nov. 2003.
6. D. Choi, S. Long, "A physically based analytic model of FET class E power amplifiers - designing for maximum PAE," IEEE Trans, on Microwave Theory and Techniques, vol. 47, pp. 1712-1720, Sept. 1999.