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Volumn , Issue , 2005, Pages 370-381

Techniques for efficient processing in runahead execution engines

Author keywords

[No Author keywords available]

Indexed keywords

OUT-OF-ORDER PROCESSORS; PREFETCHES; RUNAHEAD EXECUTION; RUNAHEAD PROCESSORS;

EID: 27544498766     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2005.49     Document Type: Conference Paper
Times cited : (92)

References (15)
  • 2
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    • Microarchitccturc optimizations for exploiting memory-level parallelism
    • Y. Chou, B. Fahs, and S. Abraham. Microarchitccturc optimizations for exploiting memory-level parallelism. In ISCA-31, 2004.
    • (2004) ISCA-31
    • Chou, Y.1    Fahs, B.2    Abraham, S.3
  • 5
    • 0030662863 scopus 로고    scopus 로고
    • Improving data cache performance by preexecuting instructions under a cache miss
    • J. Dundas and T. Mudge. Improving data cache performance by preexecuting instructions under a cache miss. In ICS-11, 1997.
    • (1997) ICS-11
    • Dundas, J.1    Mudge, T.2
  • 9
    • 85008031236 scopus 로고    scopus 로고
    • MinneSPEC: A new SPEC benchmark workload for simulation-based computer architecture research
    • 1, June
    • A. KleinOsowski and D. J. Lilja. MinneSPEC: A new SPEC benchmark workload for simulation-based computer architecture research. Computer Architecture Letters, 1, June 2002.
    • (2002) Computer Architecture Letters
    • Kleinosowski, A.1    Lilja, D.J.2
  • 10
    • 84904279959 scopus 로고
    • Lockup-free instruction fetch/prefetch cache organization
    • D. Kroft. Lockup-free instruction fetch/prefetch cache organization. In ISCA-8, 1981.
    • (1981) ISCA-8
    • Kroft, D.1
  • 11
    • 0031594012 scopus 로고    scopus 로고
    • Pipeline gating: Speculation control for energy reduction
    • S. Manne, A. Klauser, and D. Grunwald. Pipeline gating: Speculation control for energy reduction. In ISCA-25, 1998.
    • (1998) ISCA-25
    • Manne, S.1    Klauser, A.2    Grunwald, D.3
  • 12
    • 85008013873 scopus 로고    scopus 로고
    • On reusing the results of pre-executcd instructions in a runahead execution processor
    • 4, Jan.
    • O. Mutlu, H. Kim, J. Stark, and Y. N. Patt. On reusing the results of pre-executcd instructions in a runahead execution processor. Computer Architecture Letters, 4, Jan. 2005.
    • (2005) Computer Architecture Letters
    • Mutlu, O.1    Kim, H.2    Stark, J.3    Patt, Y.N.4
  • 13
    • 84955506994 scopus 로고    scopus 로고
    • Runahead execution: An alternative to very large instruction windows for out-of-order processors
    • O. Mutlu, J. Stark, C. Wilkerson, and Y. N. Patt. Runahead execution: An alternative to very large instruction windows for out-of-order processors, In HPCA-9, 2003.
    • (2003) HPCA-9
    • Mutlu, O.1    Stark, J.2    Wilkerson, C.3    Patt, Y.N.4
  • 14
    • 1342282617 scopus 로고    scopus 로고
    • Runahead execution: An effective alternative to large instruction windows
    • Nov./Dec.
    • O. Mutlu, J. Stark, C. Wilkerson, and Y. N. Patt. Runahead execution: An effective alternative to large instruction windows. IEEE Micro, 23(6):20-25, Nov./Dec. 2003.
    • (2003) IEEE Micro , vol.23 , Issue.6 , pp. 20-25
    • Mutlu, O.1    Stark, J.2    Wilkerson, C.3    Patt, Y.N.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.