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Volumn 4, Issue 1, 2005, Pages 2-5

On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor

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EID: 85008013873     PISSN: 15566056     EISSN: None     Source Type: Journal    
DOI: 10.1109/L-CA.2005.1     Document Type: Article
Times cited : (34)

References (11)
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    • (2003) MICRO-36 , pp. 423-434
    • Akkary, H.1    Rajwar, R.2    Srinivasan, S.T.3
  • 2
    • 85060036181 scopus 로고
    • Validity of the single-processor approach to achieving large scale computing capabilities
    • G. M. Amdahl. Validity of the single-processor approach to achieving large scale computing capabilities. In AFIPS Conference Proceedings, pages 483–485, 1967.
    • (1967) AFIPS Conference Proceedings , pp. 483-485
    • Amdahl, G.M.1
  • 3
    • 0030662863 scopus 로고    scopus 로고
    • Improving data cache performance by pre-executing instructions under a cache miss
    • J. Dundas and T. Mudge. Improving data cache performance by pre-executing instructions under a cache miss. In ICS-11, 1997.
    • (1997) ICS-11
    • Dundas, J.1    Mudge, T.2
  • 4
    • 1142307093 scopus 로고    scopus 로고
    • Improving Processor Performance by Dynamically Pre-Processing the Instruction Stream. PhD thesis Univ. of Michigan
    • J. D. Dundas. Improving Processor Performance by Dynamically Pre-Processing the Instruction Stream. PhD thesis, Univ. of Michigan, 1998.
    • (1998)
    • Dundas, J.D.1
  • 5
    • 85008031236 scopus 로고    scopus 로고
    • MinneSPEC: A new SPEC benchmark workload for simulation-based computer architecture research
    • June
    • A. KleinOsowski and D. J. Lilja. MinneSPEC: A new SPEC benchmark workload for simulation-based computer architecture research. Computer Architecture Letters, 1, June 2002.
    • (2002) Computer Architecture Letters , vol.1
    • KleinOsowski, A.1    Lilja, D.J.2
  • 6
    • 33749409988 scopus 로고    scopus 로고
    • Value locality and load value prediction
    • M. H. Lipasti, C. Wilkerson, and J. P. Shen. Value locality and load value prediction. In ASPLOS-7, pages 226–237, 1996.
    • (1996) ASPLOS-7 , pp. 226-237
    • Lipasti, M.H.1    Wilkerson, C.2    Shen, J.P.3
  • 7
    • 84955506994 scopus 로고    scopus 로고
    • Runahead execution: An alternative to very large instruction windows for out-of-order processors
    • O. Mutlu, J. Stark, C. Wilkerson, and Y. N. Patt. Runahead execution: An alternative to very large instruction windows for out-of-order processors. In HPCA-9, pages 129–140, 2003.
    • (2003) HPCA-9 , pp. 129-140
    • Mutlu, O.1    Stark, J.2    Wilkerson, C.3    Patt, Y.N.4
  • 8
    • 0030652674 scopus 로고    scopus 로고
    • Dynamic instruction reuse
    • A. Sodani and G. S. Sohi. Dynamic instruction reuse. In ISCA-24, pages 194–205, 1997.
    • (1997) ISCA-24 , pp. 194-205
    • Sodani, A.1    Sohi, G.S.2
  • 9
    • 0032316241 scopus 로고    scopus 로고
    • Understanding the differences between value prediction and instruction reuse
    • A. Sodani and G. S. Sohi. Understanding the differences between value prediction and instruction reuse. In MICRO-31, pages 205–215, 1998.
    • (1998) MICRO-31 , pp. 205-215
    • Sodani, A.1    Sohi, G.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.