Novel single-poly EEPROM with damascene control-gate structure

IEEE Electron Device Letters

Volumn 26, Issue 10, 2005, Pages 770-772

  Sung, Hung Cheng ^a   Lei, Tan Fu ^a   Hsu, Te Hsun ^b   Wang, S William ^b   Kao, Ya Chen ^b   Lin, Yung Tao ^b   Wang, Chung S ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

Atomic layer deposition (ALD); Damascene; EEPROM; Single poly

Indexed keywords

ALUMINA; CMOS INTEGRATED CIRCUITS; DEPOSITION; DIELECTRIC MATERIALS; ELECTRIC POTENTIAL; ELECTRON TUNNELING; PERMITTIVITY; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR STORAGE; TUNGSTEN;

ATOMIC LAYER DEPOSITION; CHANNEL ERASING; DAMASCENE CONTROL GATE (CG) STRUCTURE; ELECTRONICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY (EEPROM); FOWLER-NORDHEIM TUNNELING; HIGH VOLTAGE DEVICES; HOT ELECTRON INJECTION; STACKED-GATE CELL;

PROM;

EID: 27144453004     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.856014     Document Type: Article

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