Power analysis of rotary clock

Proceedings - IEEE Computer Society Annual Symposium on VLSI - New Frontiers in VLSI

Volumn , Issue , 2005, Pages 150-155

  Yu, Zhengtao ^a   Liu, Xun ^a  

^a North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK DESIGN; POWER ANALYSIS; POWER DISSIPATION; ROTARY CLOCK;

COMPUTER SIMULATION; COMPUTER SOFTWARE; ELECTRIC LINES; ELECTRIC LOSSES; FREQUENCIES; MACHINE DESIGN; WAVE PROPAGATION;

CLOCKS;

EID: 26844538899     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. D. E. Duarte, N. Vijaykrishnan, and M. J. Irwin. Impact of technology scaling in the clock system power. In Proc. of the IEEE Computer Society Annual Symp. on VLSI, Apr. 2002.
2. D. E. Duarte, N. Vijaykrishnan, and M. J. Irwin. A clock power model to evaluate impact of architectural and technology optimizations - a summary. In IEEE Circuits and Systems Magazine, 2003.
3. P. E. Gronowski, W. J. Bowhill, R. P. Preston, M. K. Gowan, and R. L. Allmon. High-performance microprocessor design. Journal of Solid-State Circuits, 33(5):676-686, May 1998.
4. F. W. Grover. Inductance Calculations: Working Formulas and Tables. Dover Publications Inc., 180 Varick Street, New York, N.Y. 10014, 1973.
5. S. H. Hall, G. W. Hall, and J. A. McCall. High Speed Digital System Design: a Handbook of Interconnect Theory and Design Practices. New York: Willey, c2000, 2000.
6. R. Ho, K. W. Mai, and M. A. Horowitz. The future of wires. Proc. of the IEEE, 89(4), Apr. 2001.
7. A. F. Milsom, K. J. Scott, G.Clark, J. C. McEntegart, S. Ahmed, and F. N. Soper. FACET - a CAE system for RF analogue simulation including layout. In 26th ACM/IEEE Design Automation Conf., pages 622-625, June 1989.
8. MOSIS. Mosis parametric test results (T46U) for logic process epitaxial wafers in SCN018 technology.
9. A. M. Niknejad and R. G. Meyer. Analysis, design, and optimization of spiral inductors and transformers for Si RF IC's. Journal of Solid-State Circuits, 33(10): 1470-1481, Oct. 1998.
10. J. O. Plouchart, H. Ainspan, M. Soyuer, and A. E. Ruehli. A fully-monolithic SiGe differential voltage-controlled oscillator for 5 Ghz wireless applications. In IEEE Radio Frequency Integrated Circuits Symp., June 2000.
11. A. E. Ruehli. Inductance calculations in a complex integrated circuit environment. IBM Journal of Research and Development, pages 470-481, Sept. 1972.
12. A. E. Ruehli. Equivalent circuit models for three-dimensional multiconductor systems. IEEE Transactions on Microwave Theory and Techniques., 22(3), Mar. 1974.
13. A. E. Ruehli and P. A. Brennan. Efficient capacitance calculations for three-dimensional multiconductor systems. IEEE Transactions on Microwave Theory and Techniques, 21(2):76-82, Feb. 1973.
14. N. Talwalkar, C. P. Yue, and S. S. Wong. Compact modeling of high frequency phenomena for on-chip spiral inductors. In Workshop on Compact Modeling, Feb. 2003.
15. J. Wood, T. C. Edwards, and S. Lipa. Rotary traveling-wave oscillator arrays: A new clock technology. Journal of Solid-State Circuits, 36(11): 1654-1665, Nov. 2001.
16. R. Wu, C. Kuo, and K. Chang. Inductance and resistance computations for three-dimensional multiconductor interconnection structures. IEEE Trans. on Microwave Theory and Technique, 40(2), Feb. 1992.