A low-cost digital frequency testing approach for mixed-signal devices using ∑Δ modulation

Microelectronics Journal

Volumn 36, Issue 12, 2005, Pages 1080-1090

  Prenat, Guillaume ^a   Mir, Salvador ^a   Vázquez, Diego ^b   Rolíndez, Luís ^a,c  

^a TIMA LABORATORY   (France)

^b Centro Informatico Cientifico de Andalucia   (Spain)

^c STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT TESTING; LOW PASS FILTERS; MICROELECTRONICS; OPTIMIZATION; PULSE MODULATION; SIGNAL ENCODING; SIGNAL FILTERING AND PREDICTION;

DIGITAL TESTERS; FREQUENCY TESTING; SQUARE-WAVE MODULATION; SYSTEM-ON-CHIP (SOC) DEVICES;

DIGITAL CIRCUITS;

EID: 26444609040     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mejo.2005.04.062     Document Type: Article

References (13)

1. M.J. Ohletz Hybrid Built-In-Self-Test (HBIST) for mixed analog/digital integrated circuits in: Second European Test Conference 1991 pp. 307-316
2. M.F. Toner, and G.W. Roberts A frequency response, harmonic distortion and intermodulation distortion test for BIST of a sigma-delta ADC IEEE Transactions on Circuits and Systems. II. Analog and Digital Signal Processing 43 8 1996 608 613
3. K. Arabi, and B. Kaminska Testing analog and mixed-signal integrated circuits using oscillation-test method IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 16 7 1997 745 753
4. D. Vázquez, G. Huertas, G. Leger, E. Peralías, A. Rueda, and J.L. Huertas On-chip evaluation of oscillation-based-test output signals for switched-capacitor circuits Analog Integrated Circuits and Signal Processing 33 2002 201 211
5. B. Dufort, and G.W. Roberts A on-chip analog signal generation for mixed-signal built-in self-test IEEE Journal of Solid-State Circuits 34 3 1999 318 330
6. M. Mahoney DSP-based Testing of Analog and Mixed-signal Circuits 1987 IEEE Computer Society Press Washington, DC
7. S. Mir, C. Diedrich, C. Roman, and C. Domingues On-chip test signal generation for acoustic and ultrasound microelectronic interfaces in: Eighth IEEE International Mixed-Signal Testing Workshop, Montreux, Switzerland, June 2002 pp. 137-144
8. A. Bounceur, and S. Mir Génération et optimisation de vecteurs de test pour des composants analogiques et mixtes in: 7ème Journées Nationales du Réseau Doctoral de Microé lectronique, Marseille, France, May 2005
9. D. Vázquez, G. Leger, G. Huertas, A. Rueda, and J.L. Huertas A method for parameter extraction of analog sine-wave signals for mixed-signal built-in-self-test in: IEEE Design and Test Conference in Europe, Paris, France, February 2004 pp. 298-303
10. L. Rolíndez, S. Mir, G. Prenat, and A. Bounceur A 0.18 μm CMOS implementation of on-chip analogue test signal generation from digital test pattern in: IEEE Design and Test Conference in Europe, Paris, France, February vol. I 2004 pp. 704-705
11. S. Mir, L. Rolíndez, C. Domingues, and L. Rufer An implementation of memory-based on-chip analogue test signal generation in: Asia South Pacific Design Automation Conference, Invited Talk, Kitakyushu, Japan, January 2003 pp. 663-668
12. C.-K. Ong, K.-T. Cheng, and L.-C. Wang Delta-sigma modulator based mixed-signal BIST architecture for SoC in: Asia South Pacific Design Automation Conference, Kitakyushu, Japan, January 2003 pp. 669-674
13. R.H. Williams, and C.F. Hawkins Errors in testing in: IEEE International Test Conference, Washington DC, USA 1990 pp. 1018-1027