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Volumn 3553, Issue , 2005, Pages 364-373

DDM-CMP: Data-driven multithreading on a chip multiprocessor

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; INTERCONNECTION NETWORKS; PROGRAM PROCESSORS;

EID: 26444445030     PISSN: 03029743     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1007/11512622_39     Document Type: Conference Paper
Times cited : (8)

References (22)
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    • Agarwal, V.1
  • 5
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    • The stanford hydra CMP
    • Hammond, L., et al.: The Stanford Hydra CMP. IEEE Micro 20 (2000) 71-84
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    • Hammond, L.1
  • 6
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    • Piranha: A scalable architecture based on single-chip multiprocessing
    • Barroso, L., et al.: Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing. In: Proc. of the 27th ISCA. (2000) 282-293
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    • Barroso, L.1
  • 7
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    • Taylor, M.1
  • 8
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    • Kalla, R.1    Sinharoy, B.2    Tendler, M.3
  • 9
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    • A 32-way multithreaded SPARC processor
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  • 10
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    • University of Cyprus
    • Kyriacou, C., Evripidou, P., Trancoso, P.: Data Driven Multithreading Using Conventional Microprocessors. Technical Report TR-05-4, University of Cyprus (2005)
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    • Evripidou, P.: D3-machine: A Decoupled Data Driven Multithreaded architecture with variable resolution support. Parallel Computing 27 (2001) 1015-1033
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.