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Volumn 48, Issue 4, 2005, Pages 443-450

Area conscious state assignment with flip-flop and output polarity selection for finite state machine synthesis - A genetic algorithm approach

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; FLIP FLOP CIRCUITS; GENETIC ALGORITHMS; LOGIC DESIGN; OPTIMIZATION; STATE ASSIGNMENT;

EID: 25844455183     PISSN: 00104620     EISSN: None     Source Type: Journal    
DOI: 10.1093/comjnl/bxh099     Document Type: Article
Times cited : (24)

References (16)
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    • (1983) Proc. ICCAD , pp. 154-157
    • Micheli, G.D.1    Vincentelli, A.S.2    Villa, T.3
  • 3
    • 84893561614 scopus 로고
    • Optimal state assignment for finite state machines
    • Micheli, G. D., Brayton, R. K. and Vincentelli, A. S. (1985) Optimal state assignment for finite state machines. IEEE Trans. CAD, 4, 269-284.
    • (1985) IEEE Trans. CAD , vol.4 , pp. 269-284
    • Micheli, G.D.1    Brayton, R.K.2    Vincentelli, A.S.3
  • 4
    • 0022791754 scopus 로고
    • Symbolic design of combinational and sequential logic circuits implemented by two-level logic macros
    • Micheli, G. D. (1986) Symbolic design of combinational and sequential logic circuits implemented by two-level logic macros. IEEE Trans. CAD, 5, 597-616.
    • (1986) IEEE Trans. CAD , vol.5 , pp. 597-616
    • Micheli, G.D.1
  • 5
    • 0025489532 scopus 로고
    • NOVA: State assignment of finite state machines for optimal two-level logic implementation
    • Villa, T. and Vincentelli, A. S. (1990) NOVA: State assignment of finite state machines for optimal two-level logic implementation. IEEE Trans. CAD, 9, 905-924.
    • (1990) IEEE Trans. CAD , vol.9 , pp. 905-924
    • Villa, T.1    Vincentelli, A.S.2
  • 7
    • 25844504989 scopus 로고    scopus 로고
    • State assignment and flipflop selection for finite state machine synthesis - An Integrated Approach Based on Genetic Algorithm
    • Seoul, Korea, July 8-10
    • Chattopadhyay, S. and Chaudhuri, P. P. (1998) State assignment and flipflop selection for finite state machine synthesis - An Integrated Approach Based on Genetic Algorithm. In Proc. Asia Pacific Conference on Hardware Description Languages, Seoul, Korea, July 8-10.
    • (1998) Proc. Asia Pacific Conference on Hardware Description Languages
    • Chattopadhyay, S.1    Chaudhuri, P.P.2
  • 9
    • 0029342895 scopus 로고
    • State assignment of finite state machines using a henetic algorithm
    • Almaini, A., Miller, J., Thompson, P. and Billina, S. (1995) State assignment of finite state machines using a henetic algorithm. IEE P. - Comput. Dig. T., 142, 279-286.
    • (1995) IEE P. - Comput. Dig. T. , vol.142 , pp. 279-286
    • Almaini, A.1    Miller, J.2    Thompson, P.3    Billina, S.4
  • 10
    • 0036630497 scopus 로고    scopus 로고
    • Genetic algorithm based state assignment for power and area optimization
    • Xia, Y. and Almaini, A. (2002) Genetic algorithm based state assignment for power and area optimization. IEE P. - Comput. Dig. T., 149, 128-133.
    • (2002) IEE P. - Comput. Dig. T. , vol.149 , pp. 128-133
    • Xia, Y.1    Almaini, A.2
  • 11
    • 0035385511 scopus 로고    scopus 로고
    • Low power state assignment and flipflop selection for finite state machine synthesis - A genetic algorithmic approach
    • Chattopadhyay, S. (2001) Low power state assignment and flipflop selection for finite state machine synthesis - a genetic algorithmic approach. IEE P. - Comput. Dig. T, 148, 147-151.
    • (2001) IEE P. - Comput. Dig. T. , vol.148 , pp. 147-151
    • Chattopadhyay, S.1
  • 12
    • 25844458033 scopus 로고    scopus 로고
    • Area conscious state assignment and flipflop polarity selection for finite state machine synthesis - A genetic algorithm approach
    • Kolkata, India, January 1-3
    • Chattopadhyay, S., Kumar, A. and Tewari, N. (1998) Area conscious state assignment and flipflop polarity selection for finite state machine synthesis - a genetic algorithm approach. Proc. CODEC 2004, Kolkata, India, January 1-3.
    • (1998) Proc. CODEC 2004
    • Chattopadhyay, S.1    Kumar, A.2    Tewari, N.3
  • 14
    • 1542791521 scopus 로고    scopus 로고
    • Finite state machine state assignment targeting low power consumption
    • Chattopadhyay, S. and Reddy, P. (2004) Finite state machine state assignment targeting low power consumption. IEE P. - Comput. Dig. T., 151, 61-70.
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    • Chattopadhyay, S.1    Reddy, P.2
  • 16
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    • SIS: A system for sequential circuit synthesis
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    • Sentovich, E., Singh, K., Lavagno, L., Moon, C., Murgai, R., Saldanha, A., Savoj, H., Stephan, P., Brayton, R. and Sangiovanni-Vincentalli, A. (1992) SIS: A system for sequential circuit synthesis. Technical Report M92/41. Electronics Research Laboratory, College of Engineering, University of California, Berkeley, CA.
    • (1992)
    • Sentovich, E.1    Singh, K.2    Lavagno, L.3    Moon, C.4    Murgai, R.5    Saldanha, A.6    Savoj, H.7    Stephan, P.8    Brayton, R.9    Sangiovanni-Vincentalli, A.10


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.