Genetic algorithm based state assignment for power and area optimisation

IEE Proceedings: Computers and Digital Techniques

Volumn 149, Issue 4, 2002, Pages 128-133

  Xia, Y ^a   Almaini, A E A ^a  

^a EDINBURGH NAPIER UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; FUNCTIONS; GENETIC ALGORITHMS; OPTIMIZATION; VLSI CIRCUITS;

STATE ASSIGNMENT;

ENERGY DISSIPATION;

EID: 0036630497     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20020431     Document Type: Conference Paper

References (16)

1. NOVA: State assignment of finite state machines for optimal two-level logic implementations
2. State assignment in finite state machines for minimal switching power consumption
3. Syclop: Synthesis of CMOS logic for low power application
4. State assignment of finite state machines for low power applications
5. Low-power state assignment techniques for finite state machines
6. Low-power state assignment targeting two- and multilevel logic implementations
7. Low-power state assignment for finite-state machines search
8. State assignment for low power dissipation
9. State assignment for power and area minimization
10. State assignment of finite state machines using a genetic algorithm
11. State assignment of finite-state machines
12. MUSTANG: State assignment of finite-state machines targeting multilevel logic implementations
13. Minimisation of multioutput Reed-Muller binary decision diagrams using hybrid genetic algorithm
14. Datapath layout optimisation using genetic algorithm and simulated annealing
15. Towards a high-level power estimation capability