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Volumn 151, Issue 1, 2004, Pages 61-70

Finite state machine state assignment targeting low power consumption

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; ELECTRIC POWER UTILIZATION; FINITE AUTOMATA; GENETIC ALGORITHMS; OPTIMIZATION; PROBABILITY; PROBLEM SOLVING; WIRELESS TELECOMMUNICATION SYSTEMS;

EID: 1542791521     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20030980     Document Type: Conference Paper
Times cited : (25)

References (17)
  • 1
    • 0028448788 scopus 로고
    • Power Estimation in CMOS VLSI Chips
    • Liu, D., and Svensson, C.: 'Power Estimation in CMOS VLSI Chips', IEEE J. Solid-State Circuits, 1994, 29, (6), pp. 663-670
    • (1994) IEEE J. Solid-state Circuits , vol.29 , Issue.6 , pp. 663-670
    • Liu, D.1    Svensson, C.2
  • 3
    • 1542435626 scopus 로고
    • State Assignment for Low Power Dissipation
    • Benini, L., and DeMicheli, G.: 'State Assignment for Low Power Dissipation', IEEE J. Solid-State Circuits, 1994, 29, (3), pp. 32-40
    • (1994) IEEE J. Solid-state Circuits , vol.29 , Issue.3 , pp. 32-40
    • Benini, L.1    DeMicheli, G.2
  • 6
    • 84990479742 scopus 로고
    • An Efficient Heuristic Procedure for Partitioning Graphs
    • Kernighan, B.W., and Lin, S.: 'An Efficient Heuristic Procedure for Partitioning Graphs', Bell Syst. Tech. J., 1970, pp. 291-307
    • (1970) Bell Syst. Tech. J. , pp. 291-307
    • Kernighan, B.W.1    Lin, S.2
  • 7
    • 0029206336 scopus 로고
    • Re-encoding for low power state assignment of FSMs
    • April
    • Vamshi, V., Tyagi, A., and Suresh, R.: 'Re-encoding for low power state assignment of FSMs'. Presented at ISLPED, April 1995
    • (1995) ISLPED
    • Vamshi, V.1    Tyagi, A.2    Suresh, R.3
  • 8
    • 0002466869 scopus 로고
    • SYCLOP: Synthesis of CMOS Logic for Low Power Applications
    • Roy, K., and Prasad, S.: 'SYCLOP: Synthesis of CMOS Logic for Low Power Applications'. Proc. Int. Conf. on Computer Design (ICCD), 1992, pp. 464-467
    • (1992) Proc. Int. Conf. on Computer Design (ICCD) , pp. 464-467
    • Roy, K.1    Prasad, S.2
  • 10
    • 24344448093 scopus 로고    scopus 로고
    • Spanning Tree-based State Encoding for Low Power Dissipation
    • Germany, 9-12 March
    • Noeth, W., and Kolla, R.: 'Spanning Tree-based State Encoding for Low Power Dissipation'. Presented at the Design Automation and Test in Europe Conf., Germany, 9-12 March 1999
    • (1999) Design Automation and Test in Europe Conf.
    • Noeth, W.1    Kolla, R.2
  • 12
    • 0035385511 scopus 로고    scopus 로고
    • Low power state assignment and flipflop selection for finite state machine synthesis - A Genetic Algorithm Approach
    • Chattopadhyay, S.: 'Low power state assignment and flipflop selection for finite state machine synthesis - a Genetic Algorithm Approach', IEE Proc., Comput. Digit. Tech., 2001, 148, (4/5), pp. 147-151
    • (2001) IEE Proc., Comput. Digit. Tech. , vol.148 , Issue.4-5 , pp. 147-151
    • Chattopadhyay, S.1
  • 13
    • 0036630497 scopus 로고    scopus 로고
    • Genetic algorithm based state assignment for power and area optimisation
    • Xia, Y., and Almaini, A.E.A.: 'Genetic algorithm based state assignment for power and area optimisation', IEE Proc., Comput. Digit. Tech., 2002, 149, (4), pp. 128-133
    • (2002) IEE Proc., Comput. Digit. Tech. , vol.149 , Issue.4 , pp. 128-133
    • Xia, Y.1    Almaini, A.E.A.2
  • 17
    • 0004529209 scopus 로고
    • Synthesis of multi-level logic from symbolic high-level description languages
    • Aug
    • Lin, B., and Newton, A.R.: 'Synthesis of multi-level logic from symbolic high-level description languages'. Proc. Int. Conf. on Very Large Scale Integration, Aug 1989, pp. 187-196
    • (1989) Proc. Int. Conf. on Very Large Scale Integration , pp. 187-196
    • Lin, B.1    Newton, A.R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.