Valence-band electron-tunneling measurement of the gate work function: Application to the high- κ /polycrystalline-silicon interface

Journal of Applied Physics

Volumn 98, Issue 5, 2005, Pages

  Pantisano, Luigi ^a   Afanas'ev, Valeri ^b   Pourtois, Geoffrey ^a   Chen, P J ^c  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BAND ALIGNMENT; SUBMONOLAYER TRACES; VALENCE-BAND ELECTRON TUNNELING (VBET); VALENCE-BAND ELECTRONS;

DIELECTRIC MATERIALS; HAFNIUM COMPOUNDS; MOSFET DEVICES; SILICON;

ELECTRON TUNNELING;

EID: 25144436037     PISSN: 00218979     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.2031947     Document Type: Article

References (24)

1. V. K. Adamchuk and V. V. Afanas'ev, Prog. Surf. Sci. 41, 111 (1992).
2. E. H. Nicollian and J. R. Brews, MOS Physics and Technology, 2nd ed. (Wiley, New York, 1991).
3. S. Zafar, C. Cabral, R. Amos, and A. Callegari, Appl. Phys. Lett. 80, 4858 (2002).
4. A. Kerber, IEEE Electron Device Lett. 24, 87 (2003).
5. S. Kubicek, Proceedings of the European Solid-State Device Research Conference (ESSDERC), Estoril, Portugal, 16-18 Sept. (IEEE, Picataway, NJ, 2003), pp. 251-254.
6. M. L. Green, J. Appl. Phys. 92, 7168 (2002).
7. T. Schram, S. Beckx, S. De Gendt, J. Vertommen, and S. Lee, Solid State Technol. 46, 61 (2003).
8. J. M. Soler, E. Artacho, J. D. Gale, A. García, J. Junquera, P. Ordejón, and D. Sánchez-Portal, J. Phys.: Condens. Matter 14, 2745 (2002).
9. D. M. Ceperdley and J. B. Alder, Phys. Rev. Lett. 45, 566 (1980).
10. N. Trouillier and J. L. Martins, Phys. Rev. B 43, 1993 (1991).
11. X. Gonze, Comput. Mater. Sci. 25, 478 (2002).
12. Y. Shi, T. P. Ma, S. Prasad, and S. Handa, IEEE Trans. Electron Devices 45, 2355 (1998).
13. A. Shanware, H. Z. Massoud, E. Vogel, K. Henson, J. R. Hauser, and J. J. Wortman, Microelectron. Eng. 48, 295 (1999).
14. A. Shanware, J. P. Shiely, H. Z. Massoud, E. Vogel, K. Henson, A. Srivastava, C. Osburn, J. Hauser, and J. Wortman, Tech. Dig. - Int. Electron Devices Meet. 1999, 815.
15. S. M. Sze, Physics of Semiconductor Devices, 2nd ed. (Wiley, New York, 1981), p. 513.
16. V. Afanasiev, A. Stesmans, L. Pantisano, and T. Schram, Appl. Phys. Lett. 86, 232902 (2005).
17. G. Sjöblom, L. Pantisano, T. Schram, J. Olsson, V. V. Afanas'ev, and M. Heyns, Microelectron. Eng. 80, 2280 (2005).
18. V. Kaushik, Extended Abstracts on International Workshop on Gate Insulator (IWGI), Tokyo, Japan, 6-7 Nov. (IEEE, Picataway, NJ, 2003), p. 62.
19. A. L. P. Rotondaro, Technical Digest on VLSI Symposium, Honolulu, HI, 11-15 June (IEEE, Picataway, NJ, 2003), 2002, p. 148.
20. A. Kaneko, S. Inumiya, K. Sekine, M. Sato, Y. Kamimuta, K. Eguchi, and Y. Tsunashima, Extended Abstract of the 2003 International Conference on Solid State Devices and Materials, Tokyo, Japan, 16-18 Sept. (IEEE, Picataway, NJ, 2003), p. 56.
21. C. Hobbs, Technical Digest on VLSI Symposium, Kyoto, Japan, 10-14 June (Japan Society of Applied Physics, Tokyo, Japan, 2003), pp. 9-10.
22. L.-Å. Ragnarsson, L. Pantisano, V. Kaushik, S. Saito, Y. Shimamoto, S. De Gendt, and M. Heyns, Tech. Dig. - Int. Electron Devices Meet. 2003, 87.
23. R. Tung, Mater. Sci. Eng., R. 35, 1 (2001).
24. R. J. Powell, J. Appl. Phys. 41, 2424 (1970).