Optimized micro-via technology for high density and high frequency (> 40GHz) hermetic through-wafer connections in silicon substrates

Proceedings - Electronic Components and Technology Conference

Volumn 1, Issue , 2005, Pages 324-330

  Hauffe, R ^a   Kilian, A ^a   Winter, M ^a   Shiv, L ^a   Elger, G ^a   Heschel, M ^a   Kuhmann, J ^a   Isaacs, S ^a   Weichel, S ^a   Gaal, P ^a   Korth, H ^a   Hase, A ^a  

^a Hymite GmbH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BALL GRID ARRAY; COPLANAR LINES; OPTICAL MODULES; WAFER INTERCONNECTS;

ARRAYS; OPTICAL INTERCONNECTS; OPTIMIZATION; PHOTORESISTS; SILICON WAFERS; SUBSTRATES;

ELECTRONICS PACKAGING;

EID: 24644445251     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

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4. Tsui, Y.K. et al., "Three-dimensional packaging for multi-chip module with through-the-silicon via hole," 5th Conference (EPTC 2003), 2003, Pages: 1-7.
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7. th Electronic Components and Technology Conf, Las Vegas, NV, May. 2004, pp. 1466-1470.
8. Elger, G. et al, "Optical Leak Detection for Wafer Level Hermeticity Testing," Proc SEMICON, 2004
9. Winter, M. et al., "Simplified Optical Coupling and Alignment Scheme for Cost Effective 10Gbit/s TOSA Modules Based on Edge Emitters Hermetically Packaged in Micro-Machined Silicon Structures," accepted for publication at OFC, Annaheim, CA, March. 2005.