Probe test failure analysis of bond pad over active structure by modeling and experiment

Proceedings - Electronic Components and Technology Conference

Volumn 1, Issue , 2005, Pages 861-866

  Liu, Yong ^a   Desbiens, Don ^a   Irving, Scott ^a   Luk, Timwah ^a   Edborg, Scott ^a   Hahn, Dan ^a   Park, Steve ^a  

^a FAIRCHILD SEMICONDUCTOR   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE STRUCTURES; BOND PADS; PAD STRUCTURES;

BONDING; PARAMETER ESTIMATION;

FAILURE ANALYSIS;

EID: 24644435002     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. C.D. Hartfield, J.J. Broz and T.M. Moose, "Mechanical and Electrical Characterization of an IC Bond Pad Stack Using a Novel in-Situ Methodology", Proceedings of 29th Int Symposium for Testing and Failure Analysis, Santa Clara, CA, 2003.
2. Ikeda,T., Miyazaki, N., Kudo, K. et al, " Failure Estimation of Semiconductor Chip During Wire Bonding Process," ASME J. of Electronic Packaging, vol.121, 1999, pp85-91
3. Takahashi,Y. and Inoue, M., "Numerical study of wire bonding-Analysis of interfacial deformation between wire and pad," ASME J. of Electronic Packaging, vol. 121, 2002, pp27-36
4. Liu, Y., Irving, S., and Luk, T. W, " Thermosonic Wire Bonding Process Simulation and Bond Pad Over Active Stress Analysis", Proceedings of 54 th Electronic Components and Technology Conference, Las Vegas, May 2004, pp383-391.
5. Hotchkiss, G., et al " Effects of Probe Damage on Wirebond integrity", Proceedings of 51 th Electronic Components and Technology Conference, Las Vegas, May 2001, pp1175-1180.
6. Sauter, W., et al, " Problems with Wirebonding on Probe Marks and Possible Solutions", Proceedings of 53 th Electronic Components and Technology Conference, New Orleans, May 2003, pp1350-1358
7. Joseph Alison King, Materials Handbook for Hybrid Microelectronics, Artech House, Boston, 1998