Mechanical and Electrical Characterization of an IC Bond Pad Stack Using a Novel In-situ Methodology

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn 2003-November, Issue , 2003, Pages 486-495

  Hartfield, C D ^a   Broz, J J ^b   Moore, T M ^c  

^a TEXAS INSTRUMENTS   (United States)

^b Point Technologies Inc   (United States)

^c Omniprobe Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA VISUALIZATION; LOW-K DIELECTRIC; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS; TIMING CIRCUITS;

BONDPAD; CMP PROCESS; ELECTRICAL CHARACTERIZATION; INTERCONNECT STRUCTURES; MECHANICAL AND ELECTRICAL; MECHANICAL CHARACTERIZATIONS; SEMICONDUCTOR INDUSTRY; SI DEVICES; WAFER LEVEL TEST; WIREBONDING;

INTEGRATED CIRCUITS;

EID: 24644515426     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.31399/asm.cp.istfa2003p0486     Document Type: Conference Paper

References (14)

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