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Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 43, Issue 3, 2004, Pages 897-900

Influence of field-induced drain on the characteristics of poly-Si thin-film transistor using a self-aligned double spacer process

(2) Ahn, Jeong Ah a Kim, Ohyun a

a Pohang University of Science and Technology (POSTECH) (South Korea)

Author keywords

Double spacer process; Field induced drain (FID); Self align; Sub gate; Thin film transistor (TFT)

Indexed keywords

CHEMICAL VAPOR DEPOSITION; COMPUTER SIMULATION; DOPING (ADDITIVES); ELECTRIC CURRENTS; ELECTRIC FIELD EFFECTS; ELECTRIC INSULATORS; ELECTRIC POTENTIAL; ETCHING; GRAIN BOUNDARIES; LIQUID CRYSTAL DISPLAYS; OPTIMIZATION; SCANNING ELECTRON MICROSCOPY; THIN FILM TRANSISTORS;

DOUBLE SPACER PROCESS; FIELD-INDUCED DRAIN (FID); SELF-ALIGN; SUB-GATE;

POLYSILICON;

EID: 2442679485 PISSN: 00214922 EISSN: None Source Type: Journal
DOI: 10.1143/JJAP.43.897 Document Type: Article

Times cited : (4)

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