A novel high-performance poly-silicon thin film transistor with a self-aligned thicker sub-gate oxide near the drain/source regions

IEEE Electron Device Letters

Volumn 22, Issue 10, 2001, Pages 472-474

  Kow Ming Chang, ^a   Yuan Hung Chung, ^a   Gin Ming Lin, ^a   Jian Hong Lin, ^a   Chi Gun Deng, ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

On off current ratio; Photo masking steps; Poly silicon thin film transistor; Self aligned thicker sub gate oxide

Indexed keywords

LEAKAGE CURRENTS; MASKS; POLYSILICON; SEMICONDUCTOR DEVICE STRUCTURES;

PHOTO-MASKING;

THIN FILM TRANSISTORS;

EID: 0035473960     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.954915     Document Type: Article

References (9)

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5. A novel lightly doped drain polysilicon thin-film transistor with oxide sidewall spacer formed by one-step selective liquid phase deposition
6. Device sensitivity of field-plated high-voltage TFT's and their application to low-voltage operation
7. Characteristics of field-induced-drain (FID) poly-Si TFT's with high on/off current
8. A novel gate-overlapped LDD poly-Si thin film transistor
9. Conductivity behaviour in polycrystalline semiconductor thin film transistors