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Volumn , Issue , 2004, Pages 713-718

Interconnect capacitance estimation for FPGAs

Author keywords

[No Author keywords available]

Indexed keywords

ACOUSTIC NOISE; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; MATHEMATICAL MODELS; OPTICAL INTERCONNECTS; PARAMETER ESTIMATION;

EID: 2442513166     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (11)

References (18)
  • 8
    • 84964426030 scopus 로고    scopus 로고
    • LUT-based FPGA technology mapping for power minimization with optimal depth
    • H. Li, W-K. Mak, and Srinivas Katkoori. LUT-based FPGA technology mapping for power minimization with optimal depth. In IEEE Computer Society Workshop on VLSI, pages 123-128, 2001.
    • (2001) IEEE Computer Society Workshop on VLSI , pp. 123-128
    • Li, H.1    Mak, W.-K.2    Katkoori, S.3
  • 9
    • 0032627268 scopus 로고    scopus 로고
    • Power-dissipation driven FPGA place and route under timing constraints
    • May
    • K. Roy. Power-dissipation driven FPGA place and route under timing constraints. IEEE Transactions On Circuits and Systems, 46(5):634-637, May 1999.
    • (1999) IEEE Transactions On Circuits and Systems , vol.46 , Issue.5 , pp. 634-637
    • Roy, K.1
  • 10
    • 2442465683 scopus 로고    scopus 로고
    • Power and delay reduction via simultaneous logic and placement optimization in FPGAs
    • Paris, France
    • B. Kumthekar and F. Somenzi. Power and delay reduction via simultaneous logic and placement optimization in FPGAs. In ACM/IEEE Design, Automation and Test in Europe, pages 202-207, Paris, France, 2000.
    • (2000) ACM/IEEE Design, Automation and Test in Europe , pp. 202-207
    • Kumthekar, B.1    Somenzi, F.2
  • 13
    • 0042635650 scopus 로고    scopus 로고
    • Fast timing-driven partitioning-based placement for island style FPGAs
    • P. Maidee, C. Ababei, and K. Bazargan. Fast timing-driven partitioning-based placement for island style FPGAs. In ACM/IEEE Design Automation Conference, pages 598-603, 2003.
    • (2003) ACM/IEEE Design Automation Conference , pp. 598-603
    • Maidee, P.1    Ababei, C.2    Bazargan, K.3
  • 15
    • 2442601233 scopus 로고    scopus 로고
    • Xilinx power tools. http://www.xilinx.com/ise/power_tools, 2003.
    • (2003) Xilinx Power Tools


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.